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Message-ID: <YRapMFNb63MSPJ1E@robh.at.kernel.org>
Date: Fri, 13 Aug 2021 12:17:36 -0500
From: Rob Herring <robh@...nel.org>
To: Kishon Vijay Abraham I <kishon@...com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Marc Zyngier <maz@...nel.org>,
Tom Joseph <tjoseph@...ence.com>, linux-omap@...r.kernel.org,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Lokesh Vutla <lokeshvutla@...com>
Subject: Re: [PATCH v2 1/3] dt-bindings: PCI: ti,j721e: Add bindings to
specify legacy interrupts
On Wed, Aug 04, 2021 at 06:59:10PM +0530, Kishon Vijay Abraham I wrote:
> Add bindings to specify interrupt controller for legacy interrupts.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
> ---
> .../bindings/pci/ti,j721e-pci-host.yaml | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> index cc900202df29..f461d7b4c0cc 100644
> --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> @@ -74,6 +74,11 @@ properties:
>
> msi-map: true
>
> +patternProperties:
> + "interrupt-controller":
Not a pattern unless you meant for foo-interrupt-controller-bar to be
valid.
Anything is allowed in the node?
> + type: object
> + description: interrupt controller to handle legacy interrupts.
> +
> required:
> - compatible
> - reg
> @@ -97,6 +102,8 @@ unevaluatedProperties: false
>
> examples:
> - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/soc/ti,sci_pm_domain.h>
> #include <dt-bindings/gpio/gpio.h>
>
> @@ -131,5 +138,13 @@ examples:
> ranges = <0x01000000 0x0 0x10001000 0x00 0x10001000 0x0 0x0010000>,
> <0x02000000 0x0 0x10011000 0x00 0x10011000 0x0 0x7fef000>;
> dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
> +
> +
> + pcie0_intc: interrupt-controller {
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&gic500>;
> + interrupts = <GIC_SPI 312 IRQ_TYPE_EDGE_RISING>;
> + };
> };
> };
> --
> 2.17.1
>
>
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