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Message-ID: <8fea4d2cb86f0e6240f9559a88a7e33a@codeaurora.org>
Date: Mon, 16 Aug 2021 23:14:28 +0530
From: okukatla@...eaurora.org
To: Georgi Djakov <djakov@...nel.org>
Cc: georgi.djakov@...aro.org, bjorn.andersson@...aro.org,
evgreen@...gle.com, Andy Gross <agross@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, sboyd@...nel.org,
mdtipton@...eaurora.org, sibis@...eaurora.org,
saravanak@...gle.com, seansw@....qualcomm.com, elder@...aro.org,
linux-pm@...r.kernel.org, linux-arm-msm-owner@...r.kernel.org
Subject: Re: [v6 3/3] arm64: dts: qcom: sc7280: Add EPSS L3 interconnect
provider
On 2021-08-10 18:03, Georgi Djakov wrote:
> Hi Odelu,
>
> On 10.08.21 9:46, Odelu Kukatla wrote:
>> Add Epoch Subsystem (EPSS) L3 interconnect provider node on SC7280
>> SoCs.
>>
>> Signed-off-by: Odelu Kukatla <okukatla@...eaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 53a21d0..e78f055 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -586,6 +586,15 @@
>> qcom,bcm-voters = <&apps_bcm_voter>;
>> };
>> + epss_l3: interconnect@...90000 {
>
> This DT node should be moved after apps_rsc: rsc@...00000
> and before cpufreq@...91000
>
Thanks for review! will address this in next revision.
>> + compatible = "qcom,sc7280-epss-l3";
>> + reg = <0 0x18590000 0 1000>, <0 0x18591000 0 0x100>,
>> + <0 0x18592000 0 0x100>, <0 0x18593000 0 0x100>;
>
> Please align to the open parenthesis, to be consistent with the rest of
> the file.
>
will address this in next revision.
>> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
>> + clock-names = "xo", "alternate";
>> + #interconnect-cells = <1>;
>> + };
>> +
>> ipa: ipa@...0000 {
>> compatible = "qcom,sc7280-ipa";
>
> Thanks,
> Georgi
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