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Message-Id: <ebb2f22871aa1145e49452c21b7fb320c1cdd8bb.1629143524.git.mchehab+huawei@kernel.org>
Date: Mon, 16 Aug 2021 21:53:25 +0200
From: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
To: Rob Herring <robh+dt@...nel.org>
Cc: linuxarm@...wei.com, mauro.chehab@...wei.com,
Mauro Carvalho Chehab <mchehab+huawei@...nel.org>,
Binghui Wang <wangbinghui@...ilicon.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Xiaowei Song <songxiaowei@...ilicon.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org
Subject: [PATCH v2 1/2] dt-bindings: PCI: kirin: fix bus-range
Using bus-range = <0 1> causes a runtime warning:
[ 5.363450] pci_bus 0000:00: root bus resource [bus 00-01]
[ 5.396998] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01])
[ 5.284831] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
On Kirin 960, changing to bus-range = <0 0xff> produces a
cleaner log.
Kirin 970 is more complex, so better to just drop bus-range
as a hole.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
---
.../devicetree/bindings/pci/hisilicon,kirin-pcie.yaml | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
index c0551d2e606d..d05deebe9dbb 100644
--- a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
@@ -66,7 +66,7 @@ examples:
<0x0 0xf3f20000 0x0 0x40000>,
<0x0 0xf5000000 0x0 0x2000>;
reg-names = "dbi", "apb", "phy", "config";
- bus-range = <0x0 0x1>;
+ bus-range = <0x0 0xff>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -97,7 +97,6 @@ examples:
<0x0 0xfc180000 0x0 0x1000>,
<0x0 0xf5000000 0x0 0x2000>;
reg-names = "dbi", "apb", "config";
- bus-range = <0x0 0x1>;
msi-parent = <&its_pcie>;
#address-cells = <3>;
#size-cells = <2>;
--
2.31.1
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