lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <d71ad7f9-6972-8cc0-6dfb-b5306c9900d0@xilinx.com>
Date:   Mon, 16 Aug 2021 08:27:45 +0200
From:   Michal Simek <michal.simek@...inx.com>
To:     Rob Herring <robh@...nel.org>,
        Piyush Mehta <piyush.mehta@...inx.com>
CC:     <arnd@...db.de>, <zou_wei@...wei.com>,
        <gregkh@...uxfoundation.org>, <linus.walleij@...aro.org>,
        <michal.simek@...inx.com>, <wendy.liang@...inx.com>,
        <iwamatsu@...auri.org>, <bgolaszewski@...libre.com>,
        <rajan.vaja@...inx.com>, <linux-gpio@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <git@...inx.com>, <sgoud@...inx.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 2/3] dt-bindings: gpio: zynqmp: Add binding
 documentation for modepin



On 8/13/21 9:01 PM, Rob Herring wrote:
> On Thu, Aug 05, 2021 at 11:12:18PM +0530, Piyush Mehta wrote:
>> This patch adds DT binding document for zynqmp modepin GPIO controller.
>> Modepin GPIO controller has four GPIO pins which can be configurable
>> as input or output.
>>
>> Modepin driver is a bridge between the peripheral driver and GPIO pins.
>> It has set and get APIs for accessing GPIO pins, based on the device-tree
>> entry of reset-gpio property in the peripheral driver, every pin can be
>> configured as input/output and trigger GPIO pin.
>>
>> For more information please refer zynqMp TRM link:
>> Link: https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf
>> Chapter 2: Signals, Interfaces, and Pins
>> Table 2-2: Clock, Reset, and Configuration Pins - PS_MODE
>>
>> Signed-off-by: Piyush Mehta <piyush.mehta@...inx.com>
>> ---
>> Changes in v2:
>> - Addressed review comments: Update commit message
>>
>> https://lore.kernel.org/linux-arm-kernel/20210615080553.2021061-2-piyush.mehta@xilinx.com/T/#mbd1fbda813e33b19397b350bde75747c92a0d7e1
>> https://lore.kernel.org/linux-arm-kernel/20210615080553.2021061-2-piyush.mehta@xilinx.com/T/#me82b1444ab3776162cdb0077dfc9256365c7e736
>> ---
>>  .../bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml    | 41 ++++++++++++++++++++++
>>  1 file changed, 41 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
>> new file mode 100644
>> index 0000000..39d78f8
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
>> @@ -0,0 +1,41 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: ZynqMP Mode Pin GPIO controller
>> +
>> +description:
>> +  PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin
>> +  GPIO controller with configurable from numbers of pins (from 0 to 3 per
>> +  PS_MODE). Every pin can be configured as input/output.
>> +
>> +maintainers:
>> +  - Piyush Mehta <piyush.mehta@...inx.com>
>> +
>> +properties:
>> +  compatible:
>> +    const: xlnx,zynqmp-gpio-modepin
>> +
>> +  gpio-controller: true
>> +
>> +  "#gpio-cells":
>> +    const: 2
>> +
>> +required:
>> +  - compatible
>> +  - gpio-controller
>> +  - "#gpio-cells"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    modepin_gpio: gpio {
>> +        compatible = "xlnx,zynqmp-gpio-modepin";
>> +        gpio-controller;
>> +        #gpio-cells = <2>;
> 
> No way to interact with this h/w?
> 
> As it is part of the firmware interface, it must be a child node in the 
> firmware node schema.

Actually it is there. Only example is not showing this properly.
https://github.com/Xilinx/u-boot-xlnx/blob/master/arch/arm/dts/zynqmp.dtsi#L250

Piyush: Can you please do it as we have done with pinctrl.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml?h=v5.14-rc6#n301

like this

zynqmp_firmware: zynqmp-firmware {
    modepin_gpio: gpio {
        compatible = "xlnx,zynqmp-gpio-modepin";
        gpio-controller;
        #gpio-cells = <2>;
    };
};

That dt labels can be also removed because they are not needed in example.

Thanks,
Michal

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ