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Message-Id: <20210817221048.88063-3-kim.phillips@amd.com>
Date: Tue, 17 Aug 2021 17:10:42 -0500
From: Kim Phillips <kim.phillips@....com>
To: Peter Zijlstra <peterz@...radead.org>,
Borislav Petkov <bp@...en8.de>, Borislav Petkov <bp@...e.de>,
Ingo Molnar <mingo@...nel.org>, Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
Kim Phillips <kim.phillips@....com>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Andrew Murray <amurray@...goodpenguin.co.uk>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
"H. Peter Anvin" <hpa@...or.com>, Ian Rogers <irogers@...gle.com>,
Jiri Olsa <jolsa@...hat.com>,
Joao Martins <joao.m.martins@...cle.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Mark Rutland <mark.rutland@....com>,
Michael Petlan <mpetlan@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Robert Richter <robert.richter@....com>,
Stephane Eranian <eranian@...gle.com>,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
x86@...nel.org
Subject: [PATCH 2/8] perf/x86/amd/ibs: Add workaround for erratum #1,197
Erratum #1197 "IBS (Instruction Based Sampling) Register State May be
Incorrect After Restore From CC6" is published in a document available
at the link tag below:
"Revision Guide for AMD Family 19h Models 00h-0Fh Processors"
56683 Rev. 1.04 July 2021
Implement the erratum's suggested workaround and ignore IBS samples
if MSRC001_1031 == 0.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Kim Phillips <kim.phillips@....com>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Andrew Murray <amurray@...goodpenguin.co.uk>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Boris Ostrovsky <boris.ostrovsky@...cle.com>
Cc: "H. Peter Anvin" <hpa@...or.com>
Cc: Ian Rogers <irogers@...gle.com>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Joao Martins <joao.m.martins@...cle.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Michael Petlan <mpetlan@...hat.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Robert Richter <robert.richter@....com>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: linux-kernel@...r.kernel.org
Cc: linux-perf-users@...r.kernel.org
Cc: x86@...nel.org
---
arch/x86/events/amd/ibs.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 8c25fbd5142e..222c890527a2 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -90,6 +90,7 @@ struct perf_ibs {
unsigned long offset_mask[1];
int offset_max;
unsigned int fetch_count_reset_broken : 1;
+ unsigned int fetch_ignore_if_zero_rip : 1;
struct cpu_perf_ibs __percpu *pcpu;
struct attribute **format_attrs;
@@ -673,6 +674,10 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
if (check_rip && (ibs_data.regs[2] & IBS_RIP_INVALID)) {
regs.flags &= ~PERF_EFLAGS_EXACT;
} else {
+ /* Workaround for erratum #1,197 */
+ if (perf_ibs->fetch_ignore_if_zero_rip && !(ibs_data.regs[1]))
+ goto out;
+
set_linear_ip(®s, ibs_data.regs[1]);
regs.flags |= PERF_EFLAGS_EXACT;
}
@@ -770,6 +775,9 @@ static __init void perf_event_ibs_init(void)
if (boot_cpu_data.x86 >= 0x16 && boot_cpu_data.x86 <= 0x18)
perf_ibs_fetch.fetch_count_reset_broken = 1;
+ if (boot_cpu_data.x86 == 0x19 && boot_cpu_data.x86_model < 0x10)
+ perf_ibs_fetch.fetch_ignore_if_zero_rip = 1;
+
perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch");
if (ibs_caps & IBS_CAPS_OPCNT) {
--
2.31.1
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