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Message-ID: <0f5ae210aab8ef5e00172928c341c0e6c88790a2.camel@pengutronix.de>
Date: Tue, 17 Aug 2021 12:50:22 +0200
From: Jan Lübbe <jlu@...gutronix.de>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Borislav Petkov <bp@...en8.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Tony Luck <tony.luck@...el.com>,
James Morse <james.morse@....com>,
Robert Richter <rric@...nel.org>, linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] MAINTAINERS: EDAC/armada_xp: include dt-bindings
On Tue, 2021-08-17 at 11:38 +0200, Krzysztof Kozlowski wrote:
> Include dt-bindings for Marvell Armada XP SDRAM and L2 cache ECC in the
> EDAC-ARMADA entry.
The L2 cache binding is already described in
Documentation/devicetree/bindings/arm/l2c2x0.yaml, so this is only for the
SDRAM.
Jan
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index be8e4af8ed64..ec75414db0ce 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -6574,6 +6574,7 @@ EDAC-ARMADA
> M: Jan Luebbe <jlu@...gutronix.de>
> L: linux-edac@...r.kernel.org
> S: Maintained
> +F: Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml
> F: drivers/edac/armada_xp_*
>
> EDAC-AST2500
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