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Message-ID: <YR02VkXGgsF7W7OU@robh.at.kernel.org>
Date: Wed, 18 Aug 2021 11:33:26 -0500
From: Rob Herring <robh@...nel.org>
To: Jan Lübbe <jlu@...gutronix.de>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Borislav Petkov <bp@...en8.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Tony Luck <tony.luck@...el.com>,
James Morse <james.morse@....com>,
Robert Richter <rric@...nel.org>, linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] MAINTAINERS: EDAC/armada_xp: include dt-bindings
On Tue, Aug 17, 2021 at 12:50:22PM +0200, Jan Lübbe wrote:
> On Tue, 2021-08-17 at 11:38 +0200, Krzysztof Kozlowski wrote:
> > Include dt-bindings for Marvell Armada XP SDRAM and L2 cache ECC in the
> > EDAC-ARMADA entry.
>
> The L2 cache binding is already described in
> Documentation/devicetree/bindings/arm/l2c2x0.yaml, so this is only for the
> SDRAM.
Fixed up and applied.
Rob
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