linux-kernel - Re: [PATCH v3 2/3] KVM: x86: Handle the case of 5-level shadow page table

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Message-ID: <YR1AHVwUM8AS5JvQ@google.com>
Date:   Wed, 18 Aug 2021 17:15:09 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Wei Huang <wei.huang2@....com>
Cc:     kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
        pbonzini@...hat.com, vkuznets@...hat.com, wanpengli@...cent.com,
        jmattson@...gle.com, joro@...tes.org, tglx@...utronix.de,
        mingo@...hat.com, bp@...en8.de, x86@...nel.org, hpa@...or.com
Subject: Re: [PATCH v3 2/3] KVM: x86: Handle the case of 5-level shadow page
 table

The shortlog is very misleading.  KVM already supports 5-level paging for
traditional shadow paging.  This is specifically for shadowing nNPT, and it's
specifically for shadow everything _except_ 5-level nNPT.  Something like:

KVM: x86/mmu: Support shadowing nNPT when 5-level paging is enabled in host

On Wed, Aug 18, 2021, Wei Huang wrote:
> When the 5-level page table CPU flag is exposed, KVM code needs to handle
> this case by pointing mmu->root_hpa to a properly-constructed 5-level page
> table.

Similarly, this is wrong, or maybe just poorly worded.  This has nothing to do
with LA57 being exposed to the guest, it's purely the host using 5-level paging
and NPT being enabled and exposed to L1.