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Message-ID: <3399412.qF98CnctbS@tjmaciei-mobl5>
Date: Wed, 18 Aug 2021 14:04:41 -0700
From: Thiago Macieira <thiago.macieira@...el.com>
To: Borislav Petkov <bp@...en8.de>,
"Bae, Chang Seok" <chang.seok.bae@...el.com>
CC: "Lutomirski, Andy" <luto@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...nel.org" <mingo@...nel.org>,
"x86@...nel.org" <x86@...nel.org>,
"Brown, Len" <len.brown@...el.com>,
"Hansen, Dave" <dave.hansen@...el.com>,
"Liu, Jing2" <jing2.liu@...el.com>,
"Shankar, Ravi V" <ravi.v.shankar@...el.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v9 12/26] x86/fpu/xstate: Use feature disable (XFD) to protect dynamic user state
On Wednesday, 18 August 2021 13:43:50 PDT Bae, Chang Seok wrote:
> > Then our API needs improving. An app should be able to ask the kernel
> > "Do you support AMX?" get a proper answer and act accordingly.
>
> Maybe I’m missing something, but I wonder what’s the difference from
> reading XCR0.
That assumes the kernel will always enable the bits in XCR0, like it is doing
today and with your patch, because modifying it is a VM exit.
But it's not the only possible solution. A future kernel could decide to leave
some bits off and only enable upon request. That's how macOS/Darwin does its
AVX512 support.
--
Thiago Macieira - thiago.macieira (AT) intel.com
Software Architect - Intel DPG Cloud Engineering
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