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Message-Id: <20210819151340.741565-2-abailon@baylibre.com>
Date: Thu, 19 Aug 2021 17:13:37 +0200
From: Alexandre Bailon <abailon@...libre.com>
To: ohad@...ery.com, bjorn.andersson@...aro.org,
mathieu.poirier@...aro.org, robh+dt@...nel.org
Cc: matthias.bgg@...il.com, linux-remoteproc@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
stephane.leprovost@...iatek.com, gpain@...libre.com,
khilman@...libre.com, Alexandre Bailon <abailon@...libre.com>
Subject: [PATCH v3 1/4] dt bindings: remoteproc: Add bindings for MT8183 APU
This adds dt bindings for the APU present in the MT8183.
Signed-off-by: Alexandre Bailon <abailon@...libre.com>
---
.../bindings/remoteproc/mtk,apu.yaml | 118 ++++++++++++++++++
1 file changed, 118 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml
new file mode 100644
index 0000000000000..d5da6be66610c
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml
@@ -0,0 +1,118 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+
+---
+$id: "http://devicetree.org/schemas/remoteproc/mtk,apu.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: MT8183 AI Processor Unit (APU) a.k.a. Vision Processor Unit (VPU)
+
+description:
+ This document defines the binding for the APU, a co-processor that could
+ offload the CPU for machine learning and neural network.
+
+maintainers:
+ - Alexandre Bailon <abailon@...Libre.com>
+
+properties:
+ compatible:
+ const: mediatek,mt8183-apu
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ description:
+ Three clocks are expected for AXI, IPU and JTAG.
+ The JTAG clock seems to be required to run the DSP,
+ even when JTAG is not in use."
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: axi
+ - const: ipu
+ - const: jtag
+
+ iommus:
+ maxItems: 3
+
+ memory-region:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ pinctrl:
+ description: pinctrl handles, required to configure pins for JTAG.
+
+ pinctrl-names:
+ items:
+ - const: jtag
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - iommus
+ - memory-region
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/memory/mt8183-larb-port.h>
+ #include <dt-bindings/power/mt8183-power.h>
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ vdev0vring0: vdev0vring0 {
+ compatible = "shared-dma-pool";
+ size = <0 0x00008000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1 {
+ compatible = "shared-dma-pool";
+ size = <0 0x00008000>;
+ no-map;
+ };
+
+ vdev0buffer: vdev0buffer {
+ compatible = "shared-dma-pool";
+ size = <0 0x00100000>;
+ no-map;
+ };
+ };
+
+ apu0: apu@...00000 {
+ compatible = "mediatek,mt8183-apu";
+ reg = <0x19180000 0x14000>;
+ interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_LOW>;
+
+ iommus = <&iommu M4U_PORT_IMG_IPUO>,
+ <&iommu M4U_PORT_IMG_IPU3O>,
+ <&iommu M4U_PORT_IMG_IPUI>;
+
+ clocks = <&ipu_core0 CLK_IPU_CORE0_AXI>,
+ <&ipu_core0 CLK_IPU_CORE0_IPU>,
+ <&ipu_core0 CLK_IPU_CORE0_JTAG>;
+
+ clock-names = "axi", "ipu", "jtag";
+
+ power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>;
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>;
+ memory-region-names = "vdev0buffer", "vdev0vring0", "vdev0vring1";
+ };
+...
--
2.31.1
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