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Message-ID: <YR59KJ+SenbQ58cw@boqun-archlinux>
Date: Thu, 19 Aug 2021 23:47:52 +0800
From: Boqun Feng <boqun.feng@...il.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc: Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Arnd Bergmann <arnd@...db.de>, Marc Zyngier <maz@...nel.org>,
"K. Y. Srinivasan" <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Stephen Hemminger <sthemmin@...rosoft.com>,
Wei Liu <wei.liu@...nel.org>, Dexuan Cui <decui@...rosoft.com>,
Rob Herring <robh@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-hyperv@...r.kernel.org, linux-pci@...r.kernel.org,
Sunil Muthuswamy <sunilmut@...rosoft.com>,
Mike Rapoport <rppt@...nel.org>
Subject: Re: [PATCH v6 0/8] PCI: hv: Support host bridge probing on ARM64
On Thu, Aug 19, 2021 at 03:17:58PM +0100, Lorenzo Pieralisi wrote:
> On Tue, Jul 27, 2021 at 02:06:49AM +0800, Boqun Feng wrote:
> > Hi,
> >
> > This is the v6 for the preparation of virtual PCI support on Hyper-V
> > ARM64, Previous versions:
> >
> > v1: https://lore.kernel.org/lkml/20210319161956.2838291-1-boqun.feng@gmail.com/
> > v2: https://lore.kernel.org/lkml/20210503144635.2297386-1-boqun.feng@gmail.com/
> > v3: https://lore.kernel.org/lkml/20210609163211.3467449-1-boqun.feng@gmail.com/
> > v4: https://lore.kernel.org/lkml/20210714102737.198432-1-boqun.feng@gmail.com/
> > v5: https://lore.kernel.org/lkml/20210720134429.511541-1-boqun.feng@gmail.com/
> >
> > Changes since last version:
> >
> > * Rebase to 5.14-rc3
> >
> > * Comment fixes as suggested by Bjorn.
> >
> > The basic problem we need to resolve is that ARM64 is an arch with
> > PCI_DOMAINS_GENERIC=y, so the bus sysdata is pci_config_window. However,
> > Hyper-V PCI provides a paravirtualized PCI interface, so there is no
> > actual pci_config_window for a PCI host bridge, so no information can be
> > retrieve from the pci_config_window of a Hyper-V virtual PCI bus. Also
> > there is no corresponding ACPI device for the Hyper-V PCI root bridge,
> > which introduces a special case when trying to find the ACPI device from
> > the sysdata (see patch #3).
> >
> > With this patchset, we could enable the virtual PCI on Hyper-V ARM64
> > guest with other code under development.
> >
> > Comments and suggestions are welcome.
> >
> > Regards,
> > Boqun
> >
> > Arnd Bergmann (1):
> > PCI: hv: Generify PCI probing
> >
> > Boqun Feng (7):
> > PCI: Introduce domain_nr in pci_host_bridge
> > PCI: Support populating MSI domains of root buses via bridges
> > arm64: PCI: Restructure pcibios_root_bridge_prepare()
> > arm64: PCI: Support root bridge preparation for Hyper-V
> > PCI: hv: Set ->domain_nr of pci_host_bridge at probing time
> > PCI: hv: Set up MSI domain at bridge probing time
> > PCI: hv: Turn on the host bridge probing on ARM64
> >
> > arch/arm64/kernel/pci.c | 29 +++++++---
> > drivers/pci/controller/pci-hyperv.c | 86 +++++++++++++++++------------
> > drivers/pci/probe.c | 12 +++-
> > include/linux/pci.h | 11 ++++
> > 4 files changed, 93 insertions(+), 45 deletions(-)
>
> If we take this series via the PCI tree we'd need Catalin/Will ACKs on
> patches 3-4.
>
Got it.
> I need some time to look into [1] (thanks for that).
>
> Without [1] patch 8 is ugly, that's no news. The question is whether
> it is worth waiting for a kernel cycle to integrate [1] into this series
> or not.
>
> Is it really a problem if we postpone this series for another kernel
> cycle so that we can look into it ?
>
Well, it's definitely better for me that we can have it in 5.15-rc1 ;-),
because it's a dependency for Hyper-V virtual PCI support on ARM64 and
we plan to send the rest of work in 5.15 cycle. And I can just base on
hyperv-next for the rest of the work if this is in 5.15-rc1. But yes,
it's not really a problem, since this one still needs to work with other
patches to support virtual PCI on ARM64 Hyper-V.
In fact, I personally don't think [1] is better than patch 8 (plus patch
3 & 4): playing with ->private seems dangerous and not very helpful on
readiblity, but I agree that we should explore every potential solution,
and that's why I send [1].
Regards,
Boqun
> [1] https://lore.kernel.org/lkml/20210811153619.88922-1-boqun.feng@gmail.com/
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