[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20210819171704.z3avr2b5jur6dohl@skbuf>
Date: Thu, 19 Aug 2021 17:17:05 +0000
From: Vladimir Oltean <vladimir.oltean@....com>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC: "UNGLinuxDriver@...rochip.com" <UNGLinuxDriver@...rochip.com>,
Horatiu Vultur <horatiu.vultur@...rochip.com>,
Rob Herring <robh+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
"linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH devicetree 2/2] MIPS: mscc: ocelot: mark the phy-mode for
internal PHY ports
On Thu, Aug 19, 2021 at 08:04:16PM +0300, Vladimir Oltean wrote:
> The ocelot driver was converted to phylink, and that expects a valid
> phy_interface_t. Without a phy-mode, of_get_phy_mode returns
> PHY_INTERFACE_MODE_NA, which is not ideal because phylink rejects that.
>
> The ocelot driver was patched to treat PHY_INTERFACE_MODE_NA as
> PHY_INTERFACE_MODE_INTERNAL to work with the broken DT blobs, but we
> should fix the device trees and specify the phy-mode too.
>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
> ---
Please note that the pre-phylink driver has this check:
switch (ocelot_port->phy_mode) {
case PHY_INTERFACE_MODE_NA:
(...)
case PHY_INTERFACE_MODE_SGMII:
(...)
case PHY_INTERFACE_MODE_QSGMII:
(...)
default:
dev_err(ocelot->dev,
"invalid phy mode for port%d, (Q)SGMII only\n",
port);
of_node_put(portnp);
err = -EINVAL;
goto out_teardown;
}
So it does not actually expect PHY_INTERFACE_MODE_INTERNAL and will
error out.
Are we okay with the new device tree blobs breaking the old kernel?
Should we instead wait for a few more kernel release cycles before
changing the device tree in this regard?
Powered by blists - more mailing lists