linux-kernel - [PATCH 05/17] arm64: dts: qcom: sm6350: Add GCC node

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Message-Id: <20210820204926.235192-6-konrad.dybcio@somainline.org>
Date:   Fri, 20 Aug 2021 22:49:14 +0200
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     ~postmarketos/upstreaming@...ts.sr.ht
Cc:     martin.botka@...ainline.org,
        angelogioacchino.delregno@...ainline.org,
        marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH 05/17] arm64: dts: qcom: sm6350: Add GCC node

Add and configure GCC node to allow for referencing GCC-controlled clocks
in other nodes.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 596d3a64917c..83c46f237f28 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -3,6 +3,8 @@
  * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@...ainline.org>
  */
 
+#include <dt-bindings/clock/qcom,gcc-sm6350.h>
+#include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -358,6 +360,20 @@ soc: soc@0 {
 		dma-ranges = <0 0 0 0 0x10 0>;
 		compatible = "simple-bus";
 
+		gcc: clock-controller@...000 {
+			compatible = "qcom,gcc-sm6350";
+			reg = <0 0x00100000 0 0x1f0000>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+			clock-names = "bi_tcxo",
+				      "bi_tcxo_ao",
+				      "sleep_clk";
+			clocks = <&rpmhcc RPMH_CXO_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK_A>,
+				 <&sleep_clk>;
+		};
+
 		ipcc: mailbox@...000 {
 			compatible = "qcom,sm6350-ipcc", "qcom,ipcc";
 			reg = <0 0x00408000 0 0x1000>;
-- 
2.33.0