linux-kernel - RE: [PATCH net-next 1/1] net: phy: marvell10g: Add WAKE

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Fri, 20 Aug 2021 01:22:50 +0000
From:   "Song, Yoong Siang" <yoong.siang.song@...el.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     Marek Behún <kabel@...nel.org>,
        Russell King <linux@...linux.org.uk>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH net-next 1/1] net: phy: marvell10g: Add WAKE_PHY support
 to WOL event

> > > > Yes, you are right. I missed the effect of get_wol.
> > > > Is it needed in future to implement link change interrupt in phy
> > > > driver? Cause I dint see much phy driver implement link change
> > > > interrupt.
> > >
> > > If there is a board that has interrupt pin wired correctly from the
> > > PHY and the interrupt controller is safe to use (i.e. it is not a
> > > PCA953x which cannot handle interrupt storms correctly), then I
> > > think the PHY driver should use the interrupt, instead of polling.
> > >
> > > Marek
> >
> > Any suggestion to avoid the conflict of "WoL on link change" mentioned by
> Russell?
> > Is it make sense to create a new member called wolopts under struct
> > phy_device to track the WoL status and return the correct status in get_wol
> callback?
> 
> I really think you need to look at your PMC and see if you can make it an
> interrupt controller. You only need level interrupts, not edge. So the
> microcontroller in the PMC could just poll the GPIO. There appears to be a
> simple IPC between the host and PMC, so just extend it with a couple of
> registers, interrupt state, interrupt mask, and make use of the existing
> interrupt between the host and PMC.
> 
>     Andrew

Thanks for your suggestion. Currently, PMC is designed for platform-wide
power management and not meant to control any device specific registers.
Seem like it is not possible to make PMC an interrupt controller, but I will
continue to discuss more with my team.

Regards
Siang