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Message-ID: <e88f2e2b-ed2d-fd21-0297-f75ea75c42dc@microchip.com>
Date: Fri, 20 Aug 2021 08:19:16 +0000
From: <Claudiu.Beznea@...rochip.com>
To: <rdunlap@...radead.org>, <linux-kernel@...r.kernel.org>
CC: <lkp@...el.com>, <mturquette@...libre.com>, <sboyd@...nel.org>,
<Eugen.Hristev@...rochip.com>, <linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2] clk: at91: sama7g5: remove all kernel-doc & kernel-doc
warnings
On 20.08.2021 01:32, Randy Dunlap wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Remove all "/**" kernel-doc markers from sama7g5.c since they are
> all internal to this driver source file only.
> This eliminates 14 warnings that were reported by the kernel test robot.
>
> Signed-off-by: Randy Dunlap <rdunlap@...radead.org>
> Reported-by: kernel test robot <lkp@...el.com>
> Cc: Claudiu Beznea <claudiu.beznea@...rochip.com>
> Cc: Michael Turquette <mturquette@...libre.com>
> Cc: Stephen Boyd <sboyd@...nel.org>
> Cc: Eugen Hristev <eugen.hristev@...rochip.com>
> Cc: linux-clk@...r.kernel.org
> Cc: linux-arm-kernel@...ts.infradead.org
Reviewed-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> ---
> v2: use /* instead of /** comments for internal documentation (as
> suggested by Claudiu)
>
> drivers/clk/at91/sama7g5.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> --- linux-next-20210819.orig/drivers/clk/at91/sama7g5.c
> +++ linux-next-20210819/drivers/clk/at91/sama7g5.c
> @@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
> static DEFINE_SPINLOCK(pmc_mck0_lock);
> static DEFINE_SPINLOCK(pmc_mckX_lock);
>
> -/**
> +/*
> * PLL clocks identifiers
> * @PLL_ID_CPU: CPU PLL identifier
> * @PLL_ID_SYS: System PLL identifier
> @@ -56,7 +56,7 @@ enum pll_ids {
> PLL_ID_MAX,
> };
>
> -/**
> +/*
> * PLL type identifiers
> * @PLL_TYPE_FRAC: fractional PLL identifier
> * @PLL_TYPE_DIV: divider PLL identifier
> @@ -118,7 +118,7 @@ static const struct clk_pll_characterist
> .output = pll_outputs,
> };
>
> -/**
> +/*
> * PLL clocks description
> * @n: clock name
> * @p: clock parent
> @@ -285,7 +285,7 @@ static const struct {
> },
> };
>
> -/**
> +/*
> * Master clock (MCK[1..4]) description
> * @n: clock name
> * @ep: extra parents names array
> @@ -337,7 +337,7 @@ static const struct {
> .c = 1, },
> };
>
> -/**
> +/*
> * System clock description
> * @n: clock name
> * @p: clock parent name
> @@ -361,7 +361,7 @@ static const struct {
> /* Mux table for programmable clocks. */
> static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
>
> -/**
> +/*
> * Peripheral clock description
> * @n: clock name
> * @p: clock parent name
> @@ -449,7 +449,7 @@ static const struct {
> { .n = "uhphs_clk", .p = "mck1", .id = 106, },
> };
>
> -/**
> +/*
> * Generic clock description
> * @n: clock name
> * @pp: PLL parents
>
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