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Message-ID: <2286343a-e061-d5bb-b266-6f657cba63e2@xilinx.com>
Date: Mon, 23 Aug 2021 10:14:11 +0200
From: Michal Simek <michal.simek@...inx.com>
To: Bartosz Golaszewski <bgolaszewski@...libre.com>,
Piyush Mehta <piyush.mehta@...inx.com>
CC: Arnd Bergmann <arnd@...db.de>, Zou Wei <zou_wei@...wei.com>,
Greg KH <gregkh@...uxfoundation.org>,
Linus Walleij <linus.walleij@...aro.org>,
Michal Simek <michal.simek@...inx.com>,
<wendy.liang@...inx.com>,
"Nobuhiro Iwamatsu" <iwamatsu@...auri.org>,
Rob Herring <robh+dt@...nel.org>, <rajan.vaja@...inx.com>,
linux-gpio <linux-gpio@...r.kernel.org>,
linux-devicetree <devicetree@...r.kernel.org>,
git <git@...inx.com>, "Srinivas Goud" <sgoud@...inx.com>,
arm-soc <linux-arm-kernel@...ts.infradead.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V3 3/3] gpio: modepin: Add driver support for modepin GPIO
controller
Hi Bart,
On 8/23/21 10:02 AM, Bartosz Golaszewski wrote:
> On Wed, Aug 18, 2021 at 10:11 AM Piyush Mehta <piyush.mehta@...inx.com> wrote:
>>
>> This patch adds driver support for the zynqmp modepin GPIO controller.
>> GPIO modepin driver set and get the value and status of the PS_MODE pin,
>> based on device-tree pin configuration. These four mode pins are
>> configurable as input/output. The mode pin has a control register, which
>> have lower four-bits [0:3] are configurable as input/output, next four-bits
>> can be used for reading the data as input[4:7], and next setting the
>> output pin state output[8:11].
>>
>> Signed-off-by: Piyush Mehta <piyush.mehta@...inx.com>
>> Acked-by: Michal Simek <michal.simek@...inx.com>
>> Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
>> ---
>
> Which tree should this go through?
I would prefer to go this via gpio tree.
Thanks,
Michal
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