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Message-ID: <20210823100356.22206-1-claudiu.beznea@microchip.com>
Date: Mon, 23 Aug 2021 13:03:53 +0300
From: Claudiu Beznea <claudiu.beznea@...rochip.com>
To: <nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<ludovic.desroches@...rochip.com>, <robh+dt@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: [PATCH 0/3] ARM: dts: at91: enable ips for sama7g5
Hi,
The following patches enable UDDRC, DDR3 PHY, SECURAM and SHDWC IPs
on SAMA7G5.
Thank you,
Claudiu Beznea
Claudiu Beznea (3):
ARM: dts: at91: add ram bindings
ARM: dts: at91: add bindins for securam
ARM: dts: at91: add bindings for shdwc
arch/arm/boot/dts/at91-sama7g5ek.dts | 9 ++++++++
arch/arm/boot/dts/sama7g5.dtsi | 34 ++++++++++++++++++++++++++++
2 files changed, 43 insertions(+)
--
2.25.1
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