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Message-ID: <20210823131915.23857-1-claudiu.beznea@microchip.com>
Date:   Mon, 23 Aug 2021 16:19:11 +0300
From:   Claudiu Beznea <claudiu.beznea@...rochip.com>
To:     <nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
        <ludovic.desroches@...rochip.com>, <robh+dt@...nel.org>,
        <linux@...linux.org.uk>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: [PATCH v2 0/4] ARM: at91: add new nodes to DT and fix for PM

Hi,

The following patches enable UDDRC, DDR3 PHY, SECURAM and SHDWC IPs
on SAMA7G5.

Besides this patch 1/1 avoid the panic on PM initialization code allowing
the system to boot when PM is enabled but not enough information is
provided in DT.

Thank you,
Claudiu Beznea

Changes in v2:
- changes cover letter title from
  "ARM: dts: at91: enable ips for sama7g5" to
  "ARM: at91: add new nodes to DT and fix for PM"
- update the device tree patches title and description
- added patch "ARM: at91: pm: do not panic if ram controllers are not
  enabled"

Claudiu Beznea (4):
  ARM: at91: pm: do not panic if ram controllers are not enabled
  ARM: dts: at91: sama7g5: add ram controllers
  ARM: dts: at91: sama7g5: add securam node
  ARM: dts: at91: sama7g5: add shdwc node

 arch/arm/boot/dts/at91-sama7g5ek.dts |  9 ++++
 arch/arm/boot/dts/sama7g5.dtsi       | 34 ++++++++++++
 arch/arm/mach-at91/pm.c              | 78 ++++++++++++++++++++++------
 3 files changed, 105 insertions(+), 16 deletions(-)

-- 
2.25.1

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