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Message-Id: <20210824164801.28896-18-lakshmi.sowjanya.d@intel.com>
Date: Tue, 24 Aug 2021 22:17:58 +0530
From: lakshmi.sowjanya.d@...el.com
To: linus.walleij@...aro.org
Cc: linux-gpio@...r.kernel.org, bgolaszewski@...libre.com,
linux-kernel@...r.kernel.org, mgross@...ux.intel.com,
andriy.shevchenko@...ux.intel.com, tamal.saha@...el.com,
bala.senthil@...el.com, lakshmi.sowjanya.d@...el.com
Subject: [RFC PATCH v1 17/20] pwm: Add second alignment to the core PWM interface
From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>
The Intel(R) PMC Timed I/O driver uses the PWM interface to export a
clock from the platform. Normally, PWM output is not phase aligned to
any clock. To remedy this: add an additional PWM state parameter
specifying alignment in nanoseconds within the output period.
Co-developed-by: Christopher Hall <christopher.s.hall@...el.com>
Signed-off-by: Christopher Hall <christopher.s.hall@...el.com>
Signed-off-by: Tamal Saha <tamal.saha@...el.com>
Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>
Reviewed-by: Mark Gross <mgross@...ux.intel.com>
---
drivers/pwm/core.c | 7 +++++--
drivers/pwm/sysfs.c | 37 +++++++++++++++++++++++++++++++++++++
include/linux/pwm.h | 2 ++
3 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c
index c658585ac3bc..5d6c64916e51 100644
--- a/drivers/pwm/core.c
+++ b/drivers/pwm/core.c
@@ -271,6 +271,7 @@ int pwmchip_add(struct pwm_chip *chip)
pwm->chip = chip;
pwm->pwm = chip->base + i;
pwm->hwpwm = i;
+ pwm->state.alignment = 0;
radix_tree_insert(&pwm_tree, pwm->pwm, pwm);
}
@@ -535,7 +536,8 @@ int pwm_apply_state(struct pwm_device *pwm, const struct pwm_state *state)
int err;
if (!pwm || !state || !state->period ||
- state->duty_cycle > state->period)
+ state->duty_cycle > state->period ||
+ state->alignment >= state->period)
return -EINVAL;
chip = pwm->chip;
@@ -544,7 +546,8 @@ int pwm_apply_state(struct pwm_device *pwm, const struct pwm_state *state)
state->duty_cycle == pwm->state.duty_cycle &&
state->polarity == pwm->state.polarity &&
state->enabled == pwm->state.enabled &&
- state->usage_power == pwm->state.usage_power)
+ state->usage_power == pwm->state.usage_power &&
+ state->alignment == pwm->state.alignment)
return 0;
if (chip->ops->apply) {
diff --git a/drivers/pwm/sysfs.c b/drivers/pwm/sysfs.c
index 9903c3a7eced..5d020618d8ba 100644
--- a/drivers/pwm/sysfs.c
+++ b/drivers/pwm/sysfs.c
@@ -33,6 +33,41 @@ static struct pwm_device *child_to_pwm_device(struct device *child)
return export->pwm;
}
+static ssize_t alignment_show(struct device *child,
+ struct device_attribute *attr,
+ char *buf)
+{
+ const struct pwm_device *pwm = child_to_pwm_device(child);
+ struct pwm_state state;
+
+ pwm_get_state(pwm, &state);
+
+ return sprintf(buf, "%llu\n", state.alignment);
+}
+
+static ssize_t alignment_store(struct device *child,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct pwm_export *export = child_to_pwm_export(child);
+ struct pwm_device *pwm = export->pwm;
+ struct pwm_state state;
+ unsigned int val;
+ int ret;
+
+ ret = kstrtouint(buf, 0, &val);
+ if (ret)
+ return ret;
+
+ mutex_lock(&export->lock);
+ pwm_get_state(pwm, &state);
+ state.alignment = val;
+ ret = pwm_apply_state(pwm, &state);
+ mutex_unlock(&export->lock);
+
+ return ret ? : size;
+}
+
static ssize_t period_show(struct device *child,
struct device_attribute *attr,
char *buf)
@@ -219,6 +254,7 @@ static DEVICE_ATTR_RW(period);
static DEVICE_ATTR_RW(duty_cycle);
static DEVICE_ATTR_RW(enable);
static DEVICE_ATTR_RW(polarity);
+static DEVICE_ATTR_RW(alignment);
static DEVICE_ATTR_RO(capture);
static struct attribute *pwm_attrs[] = {
@@ -226,6 +262,7 @@ static struct attribute *pwm_attrs[] = {
&dev_attr_duty_cycle.attr,
&dev_attr_enable.attr,
&dev_attr_polarity.attr,
+ &dev_attr_alignment.attr,
&dev_attr_capture.attr,
NULL
};
diff --git a/include/linux/pwm.h b/include/linux/pwm.h
index d805fee81e2c..17ca1ea7ba94 100644
--- a/include/linux/pwm.h
+++ b/include/linux/pwm.h
@@ -59,6 +59,7 @@ enum {
* output but has more freedom regarding signal form.
* If supported, the signal can be optimized, for example to
* improve EMI by phase shifting individual channels.
+ * @alignment: offset in ns to device clock second
*/
struct pwm_state {
u64 period;
@@ -66,6 +67,7 @@ struct pwm_state {
enum pwm_polarity polarity;
bool enabled;
bool usage_power;
+ u64 alignment;
};
/**
--
2.17.1
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