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Message-ID: <CAJMQK-hkufqh2vaEKcuO+k0v2SzpCHcyZuEqrvJ__rrAek2P0A@mail.gmail.com>
Date: Tue, 24 Aug 2021 15:10:12 +0800
From: Hsin-Yi Wang <hsinyi@...omium.org>
To: Yong Wu <yong.wu@...iatek.com>
Cc: Joerg Roedel <joro@...tes.org>, Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Evan Green <evgreen@...omium.org>,
Tomasz Figa <tfiga@...gle.com>,
Tomasz Figa <tfiga@...omium.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>, srv_heupstream@...iatek.com,
Devicetree List <devicetree@...r.kernel.org>,
lkml <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
iommu@...ts.linux-foundation.org, youlin.pei@...iatek.com,
Nicolas Boichat <drinkcat@...omium.org>, anan.sun@...iatek.com,
chao.hao@...iatek.com
Subject: Re: [PATCH v2 11/29] iommu/mediatek: Always pm_runtime_get while tlb flush
On Fri, Aug 13, 2021 at 2:57 PM Yong Wu <yong.wu@...iatek.com> wrote:
>
> Prepare for 2 HWs that sharing pgtable in different power-domains.
>
> The previous SoC don't have PM. Only mt8192 has power-domain,
> and it is display's power-domain which nearly always is enabled.
>
> When there are 2 M4U HWs, it may has problem.
> In this function, we get the pm_status via the m4u dev, but it don't
> reflect the real power-domain status of the HW since there may be other
> HW also use that power-domain.
>
> Currently we could not get the real power-domain status, thus always
> pm_runtime_get here.
>
> Prepare for mt8195, thus, no need fix tags here.
>
> This patch may drop the performance, we expect the user could
> pm_runtime_get_sync before dma_alloc_attrs which need tlb ops.
Can you check if there are existing users that need to add this change?
>
> Signed-off-by: Yong Wu <yong.wu@...iatek.com>
> ---
<snip>
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