linux-kernel - [v1 4/5] arm64: dts: mediatek: Correct Nor Flash clock of MT8192

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Message-ID: <20210825011120.30481-5-chun-jie.chen@mediatek.com>
Date:   Wed, 25 Aug 2021 09:11:19 +0800
From:   Chun-Jie Chen <chun-jie.chen@...iatek.com>
To:     Matthias Brugger <matthias.bgg@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Nicolas Boichat <drinkcat@...omium.org>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>,
        <srv_heupstream@...iatek.com>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Chun-Jie Chen <chun-jie.chen@...iatek.com>
Subject: [v1 4/5] arm64: dts: mediatek: Correct Nor Flash clock of MT8192

update nor flash clock to the real one.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index d1c85d3e152b..db6f4c6dc404 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -464,9 +464,9 @@
 			compatible = "mediatek,mt8192-nor";
 			reg = <0 0x11234000 0 0xe0>;
 			interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 0>;
-			clocks = <&clk26m>,
-				 <&clk26m>,
-				 <&clk26m>;
+			clocks = <&topckgen CLK_TOP_SFLASH_SEL>,
+				 <&infracfg CLK_INFRA_FLASHIF_SFLASH>,
+				 <&infracfg CLK_INFRA_FLASHIF_TOP_H_133M>;
 			clock-names = "spi", "sf", "axi";
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.18.0