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Message-ID: <6efbfdbac55c5c8175168be96d3a2e63b4ac0f07.camel@mediatek.com>
Date:   Wed, 25 Aug 2021 02:02:53 +0000
From:   Irui Wang (王瑞) <Irui.Wang@...iatek.com>
To:     "ezequiel@...guardiasur.com.ar" <ezequiel@...guardiasur.com.ar>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        Longfei Wang (王龙飞) 
        <Longfei.Wang@...iatek.com>,
        Tiffany Lin (林慧珊) 
        <tiffany.lin@...iatek.com>,
        "frkoenig@...omium.org" <frkoenig@...omium.org>,
        "linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
        Maoguang Meng (孟毛广) 
        <Maoguang.Meng@...iatek.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "mchehab@...nel.org" <mchehab@...nel.org>,
        "tzungbi@...omium.org" <tzungbi@...omium.org>,
        Yunfei Dong (董云飞) 
        <Yunfei.Dong@...iatek.com>,
        Yong Wu (吴勇) <Yong.Wu@...iatek.com>,
        srv_heupstream <srv_heupstream@...iatek.com>,
        "tfiga@...gle.com" <tfiga@...gle.com>,
        "hverkuil-cisco@...all.nl" <hverkuil-cisco@...all.nl>,
        "hsinyi@...omium.org" <hsinyi@...omium.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        Andrew-CT Chen (陳智迪) 
        <Andrew-CT.Chen@...iatek.com>,
        "acourbot@...omium.org" <acourbot@...omium.org>
Subject: Re: [PATCH 1/9] dt-bindings: media: mtk-vcodec: Add binding for
 MT8195 two venc cores

Hi,Ezequiel,

Thanks for your reviewing.

On Tue, 2021-08-24 at 08:02 -0300, Ezequiel Garcia wrote:
> Hi Irui,
> 
> On Mon, 16 Aug 2021 at 08:00, Irui Wang <irui.wang@...iatek.com>
> wrote:
> > 
> > Enable MT8195 two H.264 venc cores, updates vcodec binding
> > document.
> > 
> > Signed-off-by: Irui Wang <irui.wang@...iatek.com>
> > ---
> >  Documentation/devicetree/bindings/media/mediatek-vcodec.txt | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-
> > vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-
> > vcodec.txt
> > index de961699ba0a..eb2e24c32426 100644
> > --- a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
> > +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
> > @@ -11,6 +11,8 @@ Required properties:
> >    "mediatek,mt8173-vcodec-dec" for MT8173 decoder.
> >    "mediatek,mt8192-vcodec-enc" for MT8192 encoder.
> >    "mediatek,mt8195-vcodec-enc" for MT8195 encoder.
> > +  "mediatek,mtk-venc-core0" for MT8195 avc core0 device.
> > +  "mediatek,mtk-venc-core1" for MT8195 avc core1 device.
> 
> What is the difference between core0 and core1?
> 
> Thanks,
> Ezequiel

Both core0 and core1 are H264 encoder hardware, they have their own
hardware register base, used power-domains/clocks/irqs. We can use any
of them for H.264 encoding, but the two cores can work together for
higher performance, it's called "frame racing", a hardware encoding
mode, control flow just like in the commit messages:

core0 frame#0.frame#2.frame#4...
core1    frame#1.frame#3.frame#5...

Thanks

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