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Message-Id: <20210825161815.266051-38-alexandru.elisei@arm.com>
Date: Wed, 25 Aug 2021 17:18:13 +0100
From: Alexandru Elisei <alexandru.elisei@....com>
To: maz@...nel.org, james.morse@....com, suzuki.poulose@....com,
linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu,
will@...nel.org, linux-kernel@...r.kernel.org
Subject: [RFC PATCH v4 37/39] KVM: arm64: Add PMSIDR_EL1 to the SPE register context
PMSIDR_EL1 is not part of the VCPU register context because the profiling
control registers were not trapped and the register is read-only. With the
introduction of the KVM_ARM_VCPU_SPE_STOP API, KVM will start trapping
accesses to the profiling control registers, add PMSIDR_EL1 to the VCPU
register context to prevent undefined exceptions in the guest.
Signed-off-by: Alexandru Elisei <alexandru.elisei@....com>
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/sys_regs.c | 22 +++++++++++++++++++---
2 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index cc46f1406196..f866c4556ff9 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -247,6 +247,7 @@ enum vcpu_sysreg {
PMSFCR_EL1, /* Sampling Filter Control Register */
PMSEVFR_EL1, /* Sampling Event Filter Register */
PMSLATFR_EL1, /* Sampling Latency Filter Register */
+ PMSIDR_EL1, /* Sampling Profiling ID Register */
PMBLIMITR_EL1, /* Profiling Buffer Limit Address Register */
PMBPTR_EL1, /* Profiling Buffer Write Pointer Register */
PMBSR_EL1, /* Profiling Buffer Status/syndrome Register */
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index cc711b081f31..1a85a0cedbec 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -603,6 +603,18 @@ static unsigned int spe_visibility(const struct kvm_vcpu *vcpu,
return REG_HIDDEN;
}
+static void reset_pmsidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
+{
+ /*
+ * When SPE is stopped by userspace, the guest reads the in-memory value
+ * of the register. When SPE is resumed, accesses to the control
+ * registers are not trapped and the guest reads the hardware
+ * value. Reset PMSIDR_EL1 to the hardware value to avoid mistmatches
+ * between the two.
+ */
+ vcpu_write_sys_reg(vcpu, read_sysreg_s(SYS_PMSIDR_EL1), PMSIDR_EL1);
+}
+
static bool access_spe_reg(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
const struct sys_reg_desc *r)
{ int reg = r->reg;
@@ -613,10 +625,14 @@ static bool access_spe_reg(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
*vcpu_pc(vcpu), *vcpu_cpsr(vcpu));
}
- if (p->is_write)
+ if (p->is_write) {
+ if (reg == PMSIDR_EL1)
+ return write_to_read_only(vcpu, p, r);
+
kvm_spe_write_sysreg(vcpu, reg, val);
- else
+ } else {
p->regval = kvm_spe_read_sysreg(vcpu, reg);
+ }
return true;
}
@@ -1568,7 +1584,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
{ SPE_SYS_REG(SYS_PMSFCR_EL1), .reg = PMSFCR_EL1 },
{ SPE_SYS_REG(SYS_PMSEVFR_EL1), .reg = PMSEVFR_EL1 },
{ SPE_SYS_REG(SYS_PMSLATFR_EL1), .reg = PMSLATFR_EL1 },
- { SPE_SYS_REG(SYS_PMSIDR_EL1), .reset = NULL },
+ { SPE_SYS_REG(SYS_PMSIDR_EL1), .reset = reset_pmsidr, .reg = PMSIDR_EL1 },
{ SPE_SYS_REG(SYS_PMBLIMITR_EL1), .reg = PMBLIMITR_EL1 },
{ SPE_SYS_REG(SYS_PMBPTR_EL1), .reg = PMBPTR_EL1 },
{ SPE_SYS_REG(SYS_PMBSR_EL1), .reg = PMBSR_EL1 },
--
2.33.0
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