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Message-Id: <20210826113231.93232-1-krzysztof.kozlowski@canonical.com>
Date: Thu, 26 Aug 2021 13:32:31 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Borislav Petkov <bp@...en8.de>, York Sun <york.sun@....com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 3/3] arm64: dts: freescale: ls1046a: drop unused big-endian property from DDR controller
The big-endian is default setting for DDR controller as expressed in
bindings and such property was never documented for Freescale DDR memory
controller. The driver also does not parse this property at all.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 687fea6d8afa..b06c285b6534 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -277,7 +277,6 @@ ddr: memory-controller@...0000 {
compatible = "fsl,qoriq-memory-controller";
reg = <0x0 0x1080000 0x0 0x1000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- big-endian;
};
ifc: ifc@...0000 {
--
2.30.2
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