[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAHk-=wg=+P1+HQXhrszxN_BgWtLc-=dWiT61KzogcJU3hnLrtQ@mail.gmail.com>
Date: Fri, 27 Aug 2021 10:16:27 -0700
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Christoph Hellwig <hch@....de>
Cc: Will Deacon <will@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Android Kernel Team <kernel-team@...roid.com>
Subject: Re: [GIT PULL] arm64 fix for 5.14
On Fri, Aug 27, 2021 at 10:10 AM Christoph Hellwig <hch@....de> wrote:
>
> They CCed me on their earlier discussion, but I did not catch up on it
> until you responded to the pull request If I understood it correct it
> was about a platform device mapping a MMIO region (like a PCI bar),
> but something about section alignment cause pfn_valid to mistrigger.
Yeah, so I can easily see the maxpfn numbers can easily end up being
rounded up to a whole memory section etc.
I think my suggested solution should JustWork(tm) - exactly because if
the area is then in that "this pfn is valid" area, it will
double-check the actual underlying page.
That said, I think x86 avoids the problem another way - by just making
sure max_pfn is exact. That works too, as long as there are no holes
in the RAM map that might be used for PCI BAR's.
So I think arm could fix it that way too, depending on their memory layout.
(x86 has that traditional hole at A0000-FFFFF, but it's special enough
that it presumably is never an issue).
Linus
Powered by blists - more mailing lists