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Message-ID: <202108280136.EP2pkUiz-lkp@intel.com>
Date: Sat, 28 Aug 2021 01:23:17 +0800
From: kernel test robot <lkp@...el.com>
To: Akhil R <akhilrajeev@...dia.com>, rgumasta@...dia.com
Cc: kbuild-all@...ts.01.org, dan.j.williams@...el.com,
dmaengine@...r.kernel.org, jonathanh@...dia.com,
kyarlagadda@...dia.com, ldewangan@...dia.com,
linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org,
p.zabel@...gutronix.de, thierry.reding@...il.com
Subject: Re: [PATCH v3 2/4] dmaengine: tegra: Add tegra gpcdma driver
Hi Akhil,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on vkoul-dmaengine/next arm64/for-next/core v5.14-rc7 next-20210827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Akhil-R/dt-bindings-dmaengine-Add-doc-for-tegra-gpcdma/20210827-150504
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: nds32-allyesconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/0cc2ab4a5b7f236155b7b7740b26589f0dac8e7c
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Akhil-R/dt-bindings-dmaengine-Add-doc-for-tegra-gpcdma/20210827-150504
git checkout 0cc2ab4a5b7f236155b7b7740b26589f0dac8e7c
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=nds32
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
drivers/dma/tegra-gpc-dma.c: In function 'tegra_dma_reset_client':
drivers/dma/tegra-gpc-dma.c:62:41: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
62 | FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, 4)
| ^~~~~~~~~~
drivers/dma/tegra-gpc-dma.c:543:16: note: in expansion of macro 'TEGRA_GPCDMA_CSR_REQ_SEL_UNUSED'
543 | csr |= TEGRA_GPCDMA_CSR_REQ_SEL_UNUSED;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/dma/tegra-gpc-dma.c: In function 'tegra_dma_prep_dma_memset':
>> drivers/dma/tegra-gpc-dma.c:834:74: warning: right shift count >= width of type [-Wshift-count-overflow]
834 | FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (dest >> 32));
| ^~
drivers/dma/tegra-gpc-dma.c: In function 'tegra_dma_prep_dma_memcpy':
drivers/dma/tegra-gpc-dma.c:905:65: warning: right shift count >= width of type [-Wshift-count-overflow]
905 | FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_SRC_PTR, (src >> 32));
| ^~
drivers/dma/tegra-gpc-dma.c:907:66: warning: right shift count >= width of type [-Wshift-count-overflow]
907 | FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (dest >> 32));
| ^~
drivers/dma/tegra-gpc-dma.c: In function 'tegra_dma_prep_slave_sg':
drivers/dma/tegra-gpc-dma.c:1012:81: warning: right shift count >= width of type [-Wshift-count-overflow]
1012 | FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_SRC_PTR, (mem >> 32));
| ^~
drivers/dma/tegra-gpc-dma.c:1017:81: warning: right shift count >= width of type [-Wshift-count-overflow]
1017 | FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (mem >> 32));
| ^~
cc1: some warnings being treated as errors
vim +834 drivers/dma/tegra-gpc-dma.c
779
780 static struct dma_async_tx_descriptor *
781 tegra_dma_prep_dma_memset(struct dma_chan *dc, dma_addr_t dest, int value,
782 size_t len, unsigned long flags)
783 {
784 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
785 struct tegra_dma_desc *dma_desc;
786 unsigned long csr, mc_seq;
787
788 /* Set dma mode to fixed pattern */
789 csr = TEGRA_GPCDMA_CSR_DMA_FIXED_PAT;
790 /* Enable once or continuous mode */
791 csr |= TEGRA_GPCDMA_CSR_ONCE;
792 /* Enable IRQ mask */
793 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK;
794 /* Enable the dma interrupt */
795 if (flags & DMA_PREP_INTERRUPT)
796 csr |= TEGRA_GPCDMA_CSR_IE_EOC;
797 /* Configure default priority weight for the channel */
798 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);
799
800 mc_seq = tdc_read(tdc, TEGRA_GPCDMA_CHAN_MCSEQ);
801 /* retain stream-id and clean rest */
802 mc_seq &= TEGRA_GPCDMA_MCSEQ_STREAM_ID0_MASK;
803
804 /* Set the address wrapping */
805 mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP0,
806 TEGRA_GPCDMA_MCSEQ_WRAP_NONE);
807 mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP1,
808 TEGRA_GPCDMA_MCSEQ_WRAP_NONE);
809
810 /* Program outstanding MC requests */
811 mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_REQ_COUNT, 1);
812 /* Set burst size */
813 mc_seq |= TEGRA_GPCDMA_MCSEQ_BURST_16;
814
815 dma_desc = kzalloc(sizeof(*dma_desc), GFP_NOWAIT);
816 if (!dma_desc)
817 return NULL;
818
819 dma_desc->bytes_requested = 0;
820 dma_desc->bytes_transferred = 0;
821
822 if ((len & 3) || (dest & 3) ||
823 len > tdc->tdma->chip_data->max_dma_count) {
824 dev_err(tdc2dev(tdc),
825 "Dma length/memory address is not supported\n");
826 kfree(dma_desc);
827 return NULL;
828 }
829
830 dma_desc->bytes_requested += len;
831 dma_desc->ch_regs.src_ptr = 0;
832 dma_desc->ch_regs.dst_ptr = dest;
833 dma_desc->ch_regs.high_addr_ptr =
> 834 FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (dest >> 32));
835 dma_desc->ch_regs.fixed_pattern = value;
836 /* Word count reg takes value as (N +1) words */
837 dma_desc->ch_regs.wcount = ((len - 4) >> 2);
838 dma_desc->ch_regs.csr = csr;
839 dma_desc->ch_regs.mmio_seq = 0;
840 dma_desc->ch_regs.mc_seq = mc_seq;
841
842 tdc->dma_desc = dma_desc;
843
844 if (!tdc->isr_handler)
845 tdc->isr_handler = handle_once_dma_done;
846
847 return vchan_tx_prep(&tdc->vc, &dma_desc->vd, flags);
848 }
849
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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