linux-kernel - Re: [PATCH RESEND v2 9/9] clk: qcom: gcc-msm8994: Add a quirk for a different SDCC configuration

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <163026663369.2676726.3000078179170142966@swboyd.mtv.corp.google.com>
Date:   Sun, 29 Aug 2021 12:50:33 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Konrad Dybcio <konrad.dybcio@...ainline.org>,
        ~postmarketos/upstreaming@...ts.sr.ht
Cc:     martin.botka@...ainline.org,
        angelogioacchino.delregno@...ainline.org,
        marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Taniya Das <tdas@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v2 9/9] clk: qcom: gcc-msm8994: Add a quirk for a different SDCC configuration

Quoting Konrad Dybcio (2021-08-29 12:36:16)
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
> index b44a844d894c..4ba2f72d3cad 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
> @@ -49,6 +49,10 @@ properties:
>      description:
>        Protected clock specifier list as per common clock binding.
>  
> +  qcom,sdcc2-clk-src-40mhz:
> +    description: SDCC2_APPS clock source runs at 40MHz.
> +    type: boolean
> +
>  required:
>    - compatible
>    - reg
> diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c
> index 72038e4c04df..55c0fd069640 100644
> --- a/drivers/clk/qcom/gcc-msm8994.c
> +++ b/drivers/clk/qcom/gcc-msm8994.c
> @@ -1012,6 +1012,19 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
>         },
>  };
>  
> +static struct freq_tbl ftbl_sdcc2_40mhz_apps_clk_src[] = {
> +       F(144000, P_XO, 16, 3, 25),
> +       F(400000, P_XO, 12, 1, 4),
> +       F(20000000, P_GPLL0, 15, 1, 2),
> +       F(25000000, P_GPLL0, 12, 1, 2),
> +       F(40000000, P_GPLL0, 15, 0, 0),
> +       F(50000000, P_GPLL0, 12, 0, 0),
> +       F(80000000, P_GPLL0, 7.5, 0, 0),
> +       F(100000000, P_GPLL0, 6, 0, 0),
> +       F(200000000, P_GPLL0, 3, 0, 0),

It should work to add more frequencies to the existing table. The
consumer will need to pick the correct frequency. That can be achieved
with an OPP table if necessary, in the consumer node.

> +       { }
> +};
> +
>  static struct freq_tbl ftbl_sdcc2_4_apps_clk_src[] = {
>         F(144000, P_XO, 16, 3, 25),
>         F(400000, P_XO, 12, 1, 4),