linux-kernel - Re: [PATCH 1/3] arm: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference

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Message-ID: <17d19b93-dbe5-cc85-f302-b52cd8eeed56@somainline.org>
Date:   Mon, 30 Aug 2021 10:28:08 +0200
From:   Marijn Suijten <marijn.suijten@...ainline.org>
To:     Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc:     phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Martin Botka <martin.botka@...ainline.org>,
        Jami Kettunen <jami.kettunen@...ainline.org>,
        Pavel Dubrova <pashadubrova@...il.com>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "open list:DRM DRIVER FOR MSM ADRENO GPU" 
        <linux-arm-msm@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/3] arm: dts: qcom: apq8064: Use 27MHz PXO clock as DSI
 PLL reference

Hi Dmitry,

On 8/30/21 3:18 AM, Dmitry Baryshkov wrote:
> On Sun, 29 Aug 2021 at 23:30, Marijn Suijten
> <marijn.suijten@...ainline.org> wrote:
>>
>> The 28NM DSI PLL driver for msm8960 calculates with a 27MHz reference
>> clock and should hence use PXO, not CXO which runs at 19.2MHz.
>>
>> Note that none of the DSI PHY/PLL drivers currently use this "ref"
>> clock; they all rely on (sometimes inexistant) global clock names and
>> usually function normally without a parent clock.  This discrepancy will
>> be corrected in a future patch, for which this change needs to be in
>> place first.
>>
>> Cc: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>> Signed-off-by: Marijn Suijten <marijn.suijten@...ainline.org>
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> 
> Checked the downstream driver, it always uses 27 MHz clock in calculations.


Given our concerns for msm8974 not updating DT in parallel with the 
kernel (hence the need for a global-name fallback because "ref" is 
missing from the DT), should we worry about the same for apq8064?  That 
is, is there a chance that the kernel but not the firmware is upgraded 
leading to the wrong parent clock being used?  The msm8960 variant of 
the 28nm PLL driver uses parent_rate in a few places and might read 
cxo's 19.2MHz erroneously instead of using pxo's 27MHz.

- Marijn