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Message-ID: <20210830155945.yuirq5tsy2migovk@pali>
Date:   Mon, 30 Aug 2021 17:59:45 +0200
From:   Pali Rohár <pali@...nel.org>
To:     Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Marc Zyngier <maz@...nel.org>,
        Masami Hiramatsu <mhiramat@...nel.org>,
        linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] PCI: uniphier: Fix INTx mask/unmask bit operation
 and remove ack function

On Monday 30 August 2021 11:22:37 Kunihiko Hayashi wrote:
> INTX mask and unmask fields in PCL_RCV_INTX register should only be
> set/reset for each bit. Clearing by PCL_RCV_INTX_ALL_MASK should be
> removed.
> 
> INTX status fields in PCL_RCV_INTX register only indicates each INTX
> interrupt status, so the handler can't clear by writing 1 to the field.
> The status is expected to be cleared by the interrupt origin.
> The ack function has no meaning, so should remove it.
> 
> Fixes: 7e6d5cd88a6f ("PCI: uniphier: Add UniPhier PCIe host controller support")
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>

Acked-by: Pali Rohár <pali@...nel.org>

> ---
>  drivers/pci/controller/dwc/pcie-uniphier.c | 16 ----------------
>  1 file changed, 16 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c
> index ebe43e9..26f630c 100644
> --- a/drivers/pci/controller/dwc/pcie-uniphier.c
> +++ b/drivers/pci/controller/dwc/pcie-uniphier.c
> @@ -181,19 +181,6 @@ static void uniphier_pcie_irq_enable(struct uniphier_pcie_priv *priv)
>  	writel(PCL_RCV_INTX_ALL_ENABLE, priv->base + PCL_RCV_INTX);
>  }
>  
> -static void uniphier_pcie_irq_ack(struct irq_data *d)
> -{
> -	struct pcie_port *pp = irq_data_get_irq_chip_data(d);
> -	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> -	struct uniphier_pcie_priv *priv = to_uniphier_pcie(pci);
> -	u32 val;
> -
> -	val = readl(priv->base + PCL_RCV_INTX);
> -	val &= ~PCL_RCV_INTX_ALL_STATUS;
> -	val |= BIT(irqd_to_hwirq(d) + PCL_RCV_INTX_STATUS_SHIFT);
> -	writel(val, priv->base + PCL_RCV_INTX);
> -}
> -
>  static void uniphier_pcie_irq_mask(struct irq_data *d)
>  {
>  	struct pcie_port *pp = irq_data_get_irq_chip_data(d);
> @@ -202,7 +189,6 @@ static void uniphier_pcie_irq_mask(struct irq_data *d)
>  	u32 val;
>  
>  	val = readl(priv->base + PCL_RCV_INTX);
> -	val &= ~PCL_RCV_INTX_ALL_MASK;
>  	val |= BIT(irqd_to_hwirq(d) + PCL_RCV_INTX_MASK_SHIFT);
>  	writel(val, priv->base + PCL_RCV_INTX);
>  }
> @@ -215,14 +201,12 @@ static void uniphier_pcie_irq_unmask(struct irq_data *d)
>  	u32 val;
>  
>  	val = readl(priv->base + PCL_RCV_INTX);
> -	val &= ~PCL_RCV_INTX_ALL_MASK;
>  	val &= ~BIT(irqd_to_hwirq(d) + PCL_RCV_INTX_MASK_SHIFT);
>  	writel(val, priv->base + PCL_RCV_INTX);
>  }
>  
>  static struct irq_chip uniphier_pcie_irq_chip = {
>  	.name = "PCI",
> -	.irq_ack = uniphier_pcie_irq_ack,
>  	.irq_mask = uniphier_pcie_irq_mask,
>  	.irq_unmask = uniphier_pcie_irq_unmask,
>  };
> -- 
> 2.7.4
> 

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