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Message-Id: <20210831081329.27420-1-andrea.zanotti@tyvak.eu>
Date: Tue, 31 Aug 2021 10:13:29 +0200
From: Andrea Zanotti <andreazanottifo@...il.com>
To: unlisted-recipients:; (no To-header on input)
Cc: Andrea Zanotti <andreazanottifo@...il.com>,
Tudor Ambarus <tudor.ambarus@...rochip.com>,
Michael Walle <michael@...le.cc>,
Pratyush Yadav <p.yadav@...com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH] mtd: spi-nor: micron-st: added support for np8p128ax60
From: Andrea Zanotti <andreazanottifo@...il.com>
Added support for P8P Parallel Phase Change Memory.
Added memory information (page size and sector size) as per data-
sheet information, after typos corrections.
At page 37, paragraph 'SPI Memory Organization', it is written
down that the memory is organized as:
* 16.772.216 bytes (typo here, there 16.777.216 bytes)
* 128 sectors of 128 Kbytes each (correct)
* 131.072 pages of 64 bytes each (typo here, as the total would be
64Mbit, but the total memory is actually 128Mbit, correct value
is 262.144 pages)
Patch tested against the aforementioned PCM memory.
No known regressions inserted, as the patch only adds the possibility
to recognize said PCM memory inside the common spi-nor driver.
Signed-off-by: Andrea Zanotti <andreazanottifo@...il.com>
---
drivers/mtd/spi-nor/micron-st.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index c224e59820a1..c78331451082 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -128,6 +128,7 @@ static const struct flash_info micron_parts[] = {
{ "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048,
SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ |
SPI_NOR_4B_OPCODES) },
+ { "np8p128ax60", {0x89, 0xda, 0x18}, 3, 128 * 1024, 128, 64, 0, 0 },
};
static const struct flash_info st_parts[] = {
--
2.17.1
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