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Message-ID: <cea89489-fd38-c6c7-cae9-c9b9a198c662@codeaurora.org>
Date: Tue, 31 Aug 2021 21:48:09 +0800
From: Jie Luo <luoj@...eaurora.org>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: andrew@...n.ch, hkallweit1@...il.com, davem@...emloft.net,
kuba@...nel.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, sricharan@...eaurora.org
Subject: Re: [PATCH v1 2/3] net: phy: add qca8081 ethernet phy driver
On 8/30/2021 7:39 PM, Russell King (Oracle) wrote:
> On Mon, Aug 30, 2021 at 07:07:32PM +0800, Luo Jie wrote:
>> +/* AN 2.5G */
>> +#define QCA808X_FAST_RETRAIN_2500BT BIT(5)
>> +#define QCA808X_ADV_LOOP_TIMING BIT(0)
>>
>> +/* Fast retrain related registers */
>> +#define QCA808X_PHY_MMD1_FAST_RETRAIN_CTL 0x93
>> +#define QCA808X_FAST_RETRAIN_CTRL_VALUE 0x1
> These are standard 802.3 defined registers bits - please add
> definitions for them to uapi/linux/mdio.h.
>
> Thanks.
will add definitions for the standard registers in the next patch set,
thanks Russell for the comments.
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