linux-kernel - Re: [PATCH 2/2] dt-bindings: opp: Add binding for qcom-cpu-opp

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Date:   Thu, 2 Sep 2021 14:16:42 -0500
From:   Rob Herring <robh@...nel.org>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>
Cc:     bjorn.andersson@...aro.org, sboyd@...nel.org, vireshk@...nel.org,
        agross@...nel.org, nm@...com, ilia.lin@...nel.org,
        niklas.cassel@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, konrad.dybcio@...ainline.org,
        marijn.suijten@...ainline.org, martin.botka@...ainline.org,
        ~postmarketos/upstreaming@...ts.sr.ht
Subject: Re: [PATCH 2/2] dt-bindings: opp: Add binding for qcom-cpu-opp

On Wed, Sep 01, 2021 at 05:55:59PM +0200, AngeloGioacchino Del Regno wrote:
> This adds a binding documenting operating-points-v2-kryo-cpu in a
> qcom-cpu-opp.yaml file. Logic is to add any new Qualcomm SoCs CPU
> related OPP compatibles in here.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> ---
>  .../devicetree/bindings/opp/qcom-cpu-opp.yaml | 68 +++++++++++++++++++
>  1 file changed, 68 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml
> 
> diff --git a/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml b/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml
> new file mode 100644
> index 000000000000..b4d83b64228c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0

As checkpatch says, dual license.

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/qcom-cpu-opp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Technologies, Inc. CPU OPP bindings
> +
> +maintainers:
> +  - Ilia Lin <ilia.lin@...nel.org>
> +
> +allOf:
> +  - $ref: opp-v2-base.yaml#
> +
> +properties:
> +  compatible:
> +    const: operating-points-v2-kryo-cpu
> +
> +  nvmem-cells:
> +    description: |
> +      A phandle pointing to a nvmem-cells node representing the efuse
> +      registers that has information about the speedbin that is used
> +      to select the right frequency/voltage value pair.
> +    maxItems: 1
> +
> +  opp-shared: true
> +
> +required:
> +  - compatible
> +
> +patternProperties:
> +  '^opp-?[0-9]+$':
> +    type: object
> +
> +    properties:
> +      clock-latency-ns: true
> +      opp-hz: true
> +      opp-microvolt: true
> +      opp-supported-hw: true
> +      required-opps: true
> +
> +    required:
> +      - opp-hz
> +
> +    unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    cpu_opp_table: opp-table-cpu {
> +        compatible = "operating-points-v2-kryo-cpu";
> +        opp-shared;
> +
> +        opp-1094400000 {
> +            opp-hz = /bits/ 64 <1094400000>;
> +            required-opps = <&cpr_opp1>;
> +        };
> +        opp-1248000000 {
> +            opp-hz = /bits/ 64 <1248000000>;
> +            required-opps = <&cpr_opp2>;
> +        };
> +        opp-1401600000 {
> +            opp-hz = /bits/ 64 <1401600000>;
> +            required-opps = <&cpr_opp3>;
> +        };
> +    };
> +...
> -- 
> 2.32.0
> 
>