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Message-Id: <20210902214708.1776690-1-robimarko@gmail.com>
Date:   Thu,  2 Sep 2021 23:47:08 +0200
From:   Robert Marko <robimarko@...il.com>
To:     agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Robert Marko <robimarko@...il.com>
Subject: [PATCH] arm64: dts: qcom: ipq8074: add SMEM support

IPQ8074 uses SMEM like other modern QCA SoC-s, so since its already
supported by the kernel add the required DT nodes.

Signed-off-by: Robert Marko <robimarko@...il.com>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index a620ac0d0b19..83e9243046aa 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -82,6 +82,29 @@ scm {
 		};
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		smem_region: memory@...00000 {
+			no-map;
+			reg = <0x0 0x4ab00000 0x0 0x00100000>;
+		};
+	};
+
+	tcsr_mutex: hwlock {
+		compatible = "qcom,tcsr-mutex";
+		syscon = <&tcsr_mutex_regs 0 0x80>;
+		#hwlock-cells = <1>;
+	};
+
+	smem {
+		compatible = "qcom,smem";
+		memory-region = <&smem_region>;
+		hwlocks = <&tcsr_mutex 0>;
+	};
+
 	soc: soc {
 		#address-cells = <0x1>;
 		#size-cells = <0x1>;
@@ -293,6 +316,11 @@ gcc: gcc@...0000 {
 			#reset-cells = <0x1>;
 		};
 
+		tcsr_mutex_regs: syscon@...5000 {
+			compatible = "syscon";
+			reg = <0x01905000 0x8000>;
+		};
+
 		sdhc_1: sdhci@...4900 {
 			compatible = "qcom,sdhci-msm-v4";
 			reg = <0x7824900 0x500>, <0x7824000 0x800>;
-- 
2.31.1

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