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Message-Id: <20210903100153.9137-1-srivasam@codeaurora.org>
Date:   Fri,  3 Sep 2021 15:31:53 +0530
From:   Srinivasa Rao Mandadapu <srivasam@...eaurora.org>
To:     agross@...nel.org, bjorn.andersson@...aro.org, lgirdwood@...il.com,
        broonie@...nel.org, robh+dt@...nel.org, plai@...eaurora.org,
        bgoswami@...eaurora.org, perex@...ex.cz, tiwai@...e.com,
        srinivas.kandagatla@...aro.org, rohitkr@...eaurora.org,
        linux-arm-msm@...r.kernel.org, alsa-devel@...a-project.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        swboyd@...omium.org, judyhsiao@...omium.org
Cc:     Srinivasa Rao Mandadapu <srivasam@...eaurora.org>
Subject: [PATCH] ASoC: qcom: lpass-platform: Reset irq clear reg post handling interrupts

Update interrupt clear register with reset value after addressing
all interrupts. This is to fix playback or capture hanging issue in
simultaneous playback and capture usecase.

Signed-off-by: Srinivasa Rao Mandadapu <srivasam@...eaurora.org>
---
 sound/soc/qcom/lpass-platform.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c
index f9df76d37858..1a0a4b0b1a03 100644
--- a/sound/soc/qcom/lpass-platform.c
+++ b/sound/soc/qcom/lpass-platform.c
@@ -749,6 +749,12 @@ static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data)
 		}
 	}
 
+	rv = regmap_write(drvdata->lpaif_map, LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), 0x0);
+	if (rv) {
+		pr_err("error writing to irqstat reg: %d\n", rv);
+		return IRQ_NONE;
+	}
+
 	return IRQ_HANDLED;
 }
 
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.

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