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Message-ID: <f0d52056-1749-9d21-8da1-041266ade437@linux.intel.com>
Date: Fri, 3 Sep 2021 16:54:04 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: Sean Christopherson <seanjc@...gle.com>,
"Kuppuswamy, Sathyanarayanan"
<sathyanarayanan.kuppuswamy@...ux.intel.com>
Cc: Dave Hansen <dave.hansen@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
x86@...nel.org, Paolo Bonzini <pbonzini@...hat.com>,
Juergen Gross <jgross@...e.com>, Deep Shah <sdeep@...are.com>,
VMware Inc <pv-drivers@...are.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>, Peter H Anvin <hpa@...or.com>,
Tony Luck <tony.luck@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Kirill Shutemov <kirill.shutemov@...ux.intel.com>,
Kuppuswamy Sathyanarayanan <knsathya@...nel.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 11/11] x86/tdx: Handle CPUID via #VE
On 9/3/2021 4:43 PM, Sean Christopherson wrote:
> On Fri, Sep 03, 2021, Kuppuswamy, Sathyanarayanan wrote:
>>
>> On 9/3/21 11:35 AM, Dave Hansen wrote:
>>> On 9/3/21 10:28 AM, Kuppuswamy Sathyanarayanan wrote:
>>>> From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
>>>>
>>>> TDX has three classes of CPUID leaves: some CPUID leaves are always
>>>> handled by the CPU, others are handled by the TDX module, and some
>>>> others are handled by the VMM. Since the VMM cannot directly intercept
>>>> the instruction these are reflected with a #VE exception to the guest,
>>>> which then converts it into a hypercall to the VMM, or handled
>>>> directly.
>>> Does this patch do any of the "handled directly" leaves? If not, why
>>> mention it?
>> It was added to give more information about CPUID leaves handling. Since
>> it has nothing to do with this patch, I can remove it.
> What leaves are "always handled by the CPU"? VTx doesn't allow disabling
> CPUID exiting, let alone conditionally exiting on a specific CPUID leaf. I don't
> see anything in the TDX specs that suggests that's any different in SEAM non-root
> mode.
It means they are handled by the TDX module, but always have the same
contents as a native CPU would.
As opposed to leaves that are modified by the TDX module.
-Andi
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