linux-kernel - [GIT PULL] RISC-V Patches for the 5.15 Merge Window, Part 1

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Message-ID: <mhng-e13c978a-0771-4577-9adc-3a4b807fbfc2@palmerdabbelt-glaptop>
Date:   Sat, 04 Sep 2021 17:15:57 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
CC:         linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V Patches for the 5.15 Merge Window, Part 1

The following changes since commit e73f0f0ee7541171d89f2e2491130c7771ba58d3:

  Linux 5.14-rc1 (2021-07-11 15:07:40 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.15-mw0

for you to fetch changes up to c24a19674258dcc968a198d8e0d4717c8f27700c:

  riscv: add support for hugepage migration (2021-08-26 22:01:22 -0700)

----------------------------------------------------------------
RISC-V Patches for the 5.15 Merge Window, Part 1

* Support for PC-relative instructions (auipc and branches) in kprobes.
* Support for forced IRQ threading.
* Support for the hlt/nohlt kernel command line options, via the generic
  idle loop.
* Support for showing the edge/level triggered behavior of interrupts in
  /proc/interrupts.
* A handful of cleanups to our address mapping mechanisms.
* Support for allocating gigantic hugepages via CMA.
* Support for the undefined behavior sanitizer.
* A handful of cleanups to the VDSO that allow the kernel to build with
  LLD.
* Support for hugepage migration.

----------------------------------------------------------------
There are a handful of patches that I'm still hoping to pick up for this merge
window, but I thoughti t would be best to get these out now rather than
waiting.

----------------------------------------------------------------
Alexandre Ghiti (6):
      riscv: Optimize kernel virtual address conversion macro
      riscv: Introduce va_kernel_pa_offset for 32-bit kernel
      riscv: Get rid of map_size parameter to create_kernel_page_table
      riscv: Use __maybe_unused instead of #ifdefs around variable declarations
      riscv: Simplify BUILTIN_DTB device tree mapping handling
      riscv: Move early fdt mapping creation in its own function

Chen Lifu (2):
      riscv: kprobes: implement the auipc instruction
      riscv: kprobes: implement the branch instructions

Chen Wandun (1):
      riscv: add support for hugepage migration

Drew Fustini (1):
      dt-bindings: riscv: add starfive jh7100 bindings

Jason Wang (1):
      riscv: use strscpy to replace strlcpy

Jisheng Zhang (2):
      riscv: Keep the riscv Kconfig selects sorted
      riscv: Enable Undefined Behavior Sanitizer UBSAN

Kefeng Wang (4):
      riscv: Allow forced irq threading
      riscv: Enable idle generic idle loop
      riscv: Enable GENERIC_IRQ_SHOW_LEVEL
      riscv: Support allocating gigantic hugepages using CMA

Kenneth Lee (1):
      riscv: fix the global name pfn_base confliction error

Palmer Dabbelt (1):
      RISC-V: Fix VDSO build for !MMU

Saleem Abdulrasool (1):
      riscv: explicitly use symbol offsets for VDSO

Tong Tiangen (1):
      riscv: Implement thread_struct whitelist for hardened usercopy

 .../devicetree/bindings/riscv/starfive.yaml        |  27 +++++
 arch/riscv/Kconfig                                 |  12 +-
 arch/riscv/Makefile                                |   6 +
 arch/riscv/include/asm/page.h                      |  21 +---
 arch/riscv/include/asm/processor.h                 |   8 ++
 arch/riscv/include/asm/vdso.h                      |  23 ++--
 arch/riscv/kernel/probes/decode-insn.c             |   5 +-
 arch/riscv/kernel/probes/simulate-insn.c           | 112 ++++++++++++++++++
 arch/riscv/kernel/setup.c                          |   2 +-
 arch/riscv/kernel/vdso/Makefile                    |  26 ++---
 arch/riscv/kernel/vdso/gen_vdso_offsets.sh         |   5 +
 arch/riscv/kernel/vdso/so2s.sh                     |   6 -
 arch/riscv/mm/init.c                               | 130 +++++++++------------
 13 files changed, 256 insertions(+), 127 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/riscv/starfive.yaml
 create mode 100755 arch/riscv/kernel/vdso/gen_vdso_offsets.sh
 delete mode 100755 arch/riscv/kernel/vdso/so2s.sh