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Message-Id: <1630906083-32194-6-git-send-email-mkshah@codeaurora.org>
Date: Mon, 6 Sep 2021 10:58:03 +0530
From: Maulik Shah <mkshah@...eaurora.org>
To: swboyd@...omium.org, mka@...omium.org, evgreen@...omium.org,
bjorn.andersson@...aro.org
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
agross@...nel.org, dianders@...omium.org, linux@...ck-us.net,
rnayak@...eaurora.org, lsrao@...eaurora.org,
Maulik Shah <mkshah@...eaurora.org>, devicetree@...r.kernel.org
Subject: [PATCH v9 5/5] arm64: dts: qcom: sc7280: Enable SoC sleep stats
Add device node for SoC sleep stats driver which provides various
low power mode stats.
Also update the reg size of aoss_qmp device to 0x400.
Cc: devicetree@...r.kernel.org
Signed-off-by: Maulik Shah <mkshah@...eaurora.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 53a21d0..aba7dd1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1473,7 +1473,7 @@
aoss_qmp: power-controller@...0000 {
compatible = "qcom,sc7280-aoss-qmp";
- reg = <0 0x0c300000 0 0x100000>;
+ reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
@@ -1484,6 +1484,11 @@
#power-domain-cells = <1>;
};
+ aop_msgram@...0048 {
+ compatible = "qcom,rpmh-sleep-stats";
+ reg = <0 0x0c3f0048 0 0x400>;
+ };
+
spmi_bus: spmi@...0000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0 0x0c440000 0 0x1100>,
--
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