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Message-ID: <YTXfmRIwWREJgEU9@zn.tnic>
Date:   Mon, 6 Sep 2021 11:30:01 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Hao Peng <flyingpenghao@...il.com>
Cc:     tglx@...utronix.de, mingo@...hat.com, x86@...nel.org,
        linux-kernel@...r.kernel.org,
        Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Subject: Re: [PATCH] x86/tsx: clear RTM and HLE when MSR_IA32_TSX_CTRL is not
 supported

On Mon, Sep 06, 2021 at 10:46:05AM +0800, Hao Peng wrote:
> If hypervisor does not support MSR_IA32_TSX_CTRL, but guest supports
> RTM and HLE features, it will affect TAA mitigation.
> 
> Signed-off-by: Peng Hao <flyingpeng@...cent.com>
> ---
>  arch/x86/kernel/cpu/tsx.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/x86/kernel/cpu/tsx.c b/arch/x86/kernel/cpu/tsx.c
> index 9c7a5f049292..5e852c14fef2 100644
> --- a/arch/x86/kernel/cpu/tsx.c
> +++ b/arch/x86/kernel/cpu/tsx.c
> @@ -122,6 +122,13 @@ void __init tsx_init(void)
> 
>         if (!tsx_ctrl_is_supported()) {
>                 tsx_ctrl_state = TSX_CTRL_NOT_SUPPORTED;
> +
> +               /* If hypervisor does not support MSR_IA32_TSX_CTRL emulation,
> +                * but guest supports RTM and HLE features, it will affect TAA
> +                * (tsx_async_abort)mitigation.
> +                */
> +               setup_clear_cpu_cap(X86_FEATURE_RTM);
> +               setup_clear_cpu_cap(X86_FEATURE_HLE);
>                 return;
>         }

How does that even happen - the hypervisor does not support the MSR but
"guest supports" TSX features?!

I guess the guest is detecting it wrong.

What hypervisor, what guest, how do I reproduce?

Please give full details.

-- 
Regards/Gruss,
    Boris.

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