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Message-ID: <3731f9a8-2923-8586-4adc-da3550a6c55a@arm.com>
Date:   Tue, 7 Sep 2021 10:10:06 +0100
From:   Suzuki K Poulose <suzuki.poulose@....com>
To:     Linu Cherian <linuc.decode@...il.com>
Cc:     linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Mark Rutland <mark.rutland@....com>, maz@...nel.org,
        Anshuman Khandual <anshuman.khandual@....com>,
        catalin.marinas@....com, Coresight ML <coresight@...ts.linaro.org>,
        linux-kernel@...r.kernel.org, james.morse@....com,
        Will Deacon <will@...nel.org>,
        Mike Leach <mike.leach@...aro.org>,
        Linu Cherian <lcherian@...vell.com>
Subject: Re: [PATCH 07/10] arm64: Add erratum detection for TRBE overwrite in
 FILL mode

On 06/08/2021 13:44, Linu Cherian wrote:
> Hi Suzuki,
> 
> On Wed, Jul 28, 2021 at 7:23 PM Suzuki K Poulose <suzuki.poulose@....com> wrote:
>>
>> Arm Neoverse-N2 and the Cortex-A710 cores are affected
>> by a CPU erratum where the TRBE will overwrite the trace buffer
>> in FILL mode. The TRBE doesn't stop (as expected in FILL mode)
>> when it reaches the limit and wraps to the base to continue
>> writing upto 3 cache lines. This will overwrite any trace that
>> was written previously.
>>
>> Add the Neoverse-N2 erratumi(#2139208) and Cortex-A710 erratum
>> (#2119858) to the  detection logic.
>>
>> This will be used by the TRBE driver in later patches to work
>> around the issue. The detection has been kept with the core
>> arm64 errata framework list to make sure :
>>    - We don't duplicate the framework in TRBE driver
>>    - The errata detection is advertised like the rest
>>      of the CPU errata.
>>
>> Note that the Kconfig entries will be added after we have added
>> the work around in the TRBE driver, which depends on the cpucap
>> from here.
>>
>> Cc: Will Deacon <will@...nel.org>
>> Cc: Mark Rutland <mark.rutland@....com>
>> Cc: Anshuman Khandual <anshuman.khandual@....com>
>> Cc: Catalin Marinas <catalin.marinas@....com>
>> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
>> Cc: Mike Leach <mike.leach@...aro.org>
>> cc: Leo Yan <leo.yan@...aro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>


>> diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
>> index 49305c2e6dfd..1ccb92165bd8 100644
>> --- a/arch/arm64/tools/cpucaps
>> +++ b/arch/arm64/tools/cpucaps
>> @@ -53,6 +53,7 @@ WORKAROUND_1418040
>>   WORKAROUND_1463225
>>   WORKAROUND_1508412
>>   WORKAROUND_1542419
>> +WORKAROUND_TRBE_OVERWRITE_FILL_MODE
>>   WORKAROUND_CAVIUM_23154
>>   WORKAROUND_CAVIUM_27456
>>   WORKAROUND_CAVIUM_30115
> 
> We need to keep this list sorted ?

Not necessary, anymore. For a given kernel the numbers are
autogenerated by the script.

See arch/arm64/tools/gen-cpucaps.awk

Suzuki

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