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Message-ID: <CAF6AEGs-E1fybsxoRONUv8NGTyGohsM_j8A6cfXwoHEK6fOF5A@mail.gmail.com>
Date: Tue, 7 Sep 2021 07:25:07 -0700
From: Rob Clark <robdclark@...il.com>
To: Amit Pundir <amit.pundir@...aro.org>
Cc: John Stultz <john.stultz@...aro.org>,
Caleb Connolly <caleb.connolly@...aro.org>,
Rob Clark <robdclark@...omium.org>,
freedreno <freedreno@...ts.freedesktop.org>,
Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
Jonathan Marek <jonathan@...ek.ca>,
David Airlie <airlied@...ux.ie>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Akhil P Oommen <akhilpo@...eaurora.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Jordan Crouse <jordan@...micpenguin.net>,
Stephen Boyd <sboyd@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Sean Paul <sean@...rly.run>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/msm: Disable frequency clamping on a630
On Tue, Sep 7, 2021 at 1:25 AM Amit Pundir <amit.pundir@...aro.org> wrote:
>
> On Tue, 7 Sept 2021 at 07:11, Rob Clark <robdclark@...il.com> wrote:
> >
> > One thing I thought of, which would be worth ruling out, is whether
> > this issue only occurs with freq changes immediately after resuming
> > the GPU, vs freq changes in general. Could you try the below patch.
> > And if it "fixes" the issue, then try reducing the delay until you
> > start seeing GPU hangs again.
>
> It doesn't fix the crash and I can still reproduce it
> https://pastebin.com/raw/bxK4mAhB
Ok, thanks for confirming. That implies the limitation is about
changing freq in general, rather than immediately after resume.. the
latter could be a new scenario after 9bc95570175a. But this confirms
that this is an issue that has been there all along.
I'm still not quite sure what the correct fix is
BR,
-R
>
> >
> > ----------
> > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> > b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> > index 40c9fef457a4..278b85207ea3 100644
> > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> > @@ -1513,6 +1513,8 @@ static int a6xx_pm_resume(struct msm_gpu *gpu)
> > if (ret)
> > return ret;
> >
> > + msleep(5);
> > +
> > msm_devfreq_resume(gpu);
> >
> > a6xx_llc_activate(a6xx_gpu);
> > ----------
> >
> > BR,
> > -R
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