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Date:   Tue, 7 Sep 2021 19:54:36 +0000
From:   Stephen Boyd <swboyd@...omium.org>
To:     Srinivasa Rao Mandadapu <srivasam@...eaurora.org>,
        agross@...nel.org, alsa-devel@...a-project.org,
        bgoswami@...eaurora.org, bjorn.andersson@...aro.org,
        broonie@...nel.org, devicetree@...r.kernel.org,
        judyhsiao@...omium.org, lgirdwood@...il.com,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        perex@...ex.cz, plai@...eaurora.org, robh+dt@...nel.org,
        rohitkr@...eaurora.org, srinivas.kandagatla@...aro.org,
        tiwai@...e.com
Subject: Re: [PATCH] ASoC: qcom: lpass-platform: Reset irq clear reg post
 handling interrupts

Quoting Srinivasa Rao Mandadapu (2021-09-06 06:35:46)
> Thanks for Your time Stephen!!
>
> On 9/4/2021 12:10 AM, Stephen Boyd wrote:
> > Quoting Srinivasa Rao Mandadapu (2021-09-03 03:01:53)
> >> Update interrupt clear register with reset value after addressing
> >> all interrupts. This is to fix playback or capture hanging issue in
> >> simultaneous playback and capture usecase.
> >>
> >> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@...eaurora.org>
> >> ---
> > Any Fixes tag?
> Actually it's incremental change. I will add base commit of this function.

Ok.

> >
> >>   sound/soc/qcom/lpass-platform.c | 6 ++++++
> >>   1 file changed, 6 insertions(+)
> >>
> >> diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c
> >> index f9df76d37858..1a0a4b0b1a03 100644
> >> --- a/sound/soc/qcom/lpass-platform.c
> >> +++ b/sound/soc/qcom/lpass-platform.c
> >> @@ -749,6 +749,12 @@ static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data)
> >>                  }
> >>          }
> >>
> >> +       rv = regmap_write(drvdata->lpaif_map, LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), 0x0);
> >> +       if (rv) {
> >> +               pr_err("error writing to irqstat reg: %d\n", rv);
> >> +               return IRQ_NONE;
> > I was thinking we should return IRQ_HANDLED still, but then I guess
> > failing to clear the irq be treated as a spurious irq so that if we fail
> > enough times we'll shut off the irq at the irqchip. Things are going bad
> > if the write fails.
> Here bit confusing. Could You please suggest How to go ahead on this?

Sorry. I think it is fine as is.

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