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Message-ID: <20210908064528.922-7-clin@suse.com>
Date: Wed, 8 Sep 2021 14:45:26 +0800
From: Chester Lin <clin@...e.com>
To: Rob Herring <robh+dt@...nel.org>,
Andreas Färber <afaerber@...e.de>,
Matthias Brugger <mbrugger@...e.com>
CC: s32@....com, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-serial@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Krzysztof Kozlowski <krzk@...nel.org>,
catalin-dan.udma@....com, bogdan.hamciuc@....com,
bogdan.folea@....com, ciprianmarian.costea@....com,
Radu Nicolae Pirea <radu-nicolae.pirea@....nxp.com>,
ghennadi.procopciuc@....com, "Ivan T . Ivanov" <iivanov@...e.de>,
"Lee, Chun-Yi" <jlee@...e.com>, Chester Lin <clin@...e.com>
Subject: [PATCH v2 6/8] arm64: dts: s32g2: add VNP-EVB and VNP-RDB2 support
Add initial device-trees of NXP S32G2's Evaluation Board (S32G-VNP-EVB)
and Reference Design 2 Board (S32G-VNP-RDB2).
Signed-off-by: Chester Lin <clin@...e.com>
---
Changes in v2:
- Correct the model string.
- Rename the compatible vendor string to "nxp,".
- Move the serial/uart aliases from the SoC .dtsi to board .dts files.
- Add comments for the uart markings on PCB.
arch/arm64/boot/dts/freescale/Makefile | 2 ++
.../arm64/boot/dts/freescale/s32g274a-evb.dts | 26 +++++++++++++++
.../boot/dts/freescale/s32g274a-rdb2.dts | 32 +++++++++++++++++++
3 files changed, 60 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-evb.dts
create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index db9e36ebe932..0d4a18bd83e6 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -70,4 +70,6 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
+dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb
+dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb
dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
new file mode 100644
index 000000000000..3aec05de0842
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2021 SUSE LLC
+ */
+
+/dts-v1/;
+
+#include "s32g2.dtsi"
+
+/ {
+ model = "NXP S32G2 Evaluation Board (S32G-VNP-EVB)";
+ compatible = "nxp,s32g274a-evb", "nxp,s32g2";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+/* UART (J58) to Micro USB port */
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
new file mode 100644
index 000000000000..ed3f23babdca
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2021 SUSE LLC
+ */
+
+/dts-v1/;
+
+#include "s32g2.dtsi"
+
+/ {
+ model = "NXP S32G2 Reference Design Board 2 (S32G-VNP-RDB2)";
+ compatible = "nxp,s32g274a-rdb2", "nxp,s32g2";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+/* UART (J2) to Micro USB port */
+&uart0 {
+ status = "okay";
+};
+
+/* UART (J1) to Micro USB port */
+&uart1 {
+ status = "okay";
+};
--
2.30.0
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