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Date: Fri, 10 Sep 2021 16:43:50 -0500
From: Rob Herring <robh@...nel.org>
To: Shengjiu Wang <shengjiu.wang@....com>
Cc: ohad@...ery.com, bjorn.andersson@...aro.org,
mathieu.poirier@...aro.org, shawnguo@...nel.org,
s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
daniel.baluta@....com, linux-imx@....com,
linux-remoteproc@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
shengjiu.wang@...il.com
Subject: Re: [PATCH v4 4/4] dt-bindings: dsp: fsl: update binding document
for remote proc driver
On Wed, Sep 08, 2021 at 05:10:55PM +0800, Shengjiu Wang wrote:
> As there are two drivers for DSP on i.MX, one is for sound open
> firmware, another is for remote processor framework. In order to
> distinguish two kinds of driver, defining different compatible strings.
What determines which firmware is used? Is it tied to the board? Or for
a given board, users could want different firmware? In the latter case,
this configuration should not be in DT.
> For remote proc driver, the properties firmware-name and fsl,dsp-ctrl
> are needed and the mailbox channel is different with SOF.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
> ---
> .../devicetree/bindings/dsp/fsl,dsp.yaml | 81 +++++++++++++++++--
> 1 file changed, 75 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> index 7afc9f2be13a..51ea657f6d42 100644
> --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> @@ -8,6 +8,7 @@ title: NXP i.MX8 DSP core
>
> maintainers:
> - Daniel Baluta <daniel.baluta@....com>
> + - Shengjiu Wang <shengjiu.wang@....com>
>
> description: |
> Some boards from i.MX8 family contain a DSP core used for
> @@ -19,6 +20,10 @@ properties:
> - fsl,imx8qxp-dsp
> - fsl,imx8qm-dsp
> - fsl,imx8mp-dsp
> + - fsl,imx8qxp-hifi4
> + - fsl,imx8qm-hifi4
> + - fsl,imx8mp-hifi4
> + - fsl,imx8ulp-hifi4
>
> reg:
> maxItems: 1
> @@ -28,37 +33,63 @@ properties:
> - description: ipg clock
> - description: ocram clock
> - description: core clock
> + - description: debug interface clock
> + - description: message unit clock
> + minItems: 3
> + maxItems: 5
>
> clock-names:
> items:
> - const: ipg
> - const: ocram
> - const: core
> + - const: debug
> + - const: mu
> + minItems: 3
> + maxItems: 5
>
> power-domains:
> description:
> List of phandle and PM domain specifier as documented in
> Documentation/devicetree/bindings/power/power_domain.txt
> + minItems: 1
> maxItems: 4
How does the same h/w have different number of power domains?
>
> mboxes:
> description:
> List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
> + or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB
> (see mailbox/fsl,mu.txt)
> + minItems: 3
> maxItems: 4
>
> mbox-names:
> - items:
> - - const: txdb0
> - - const: txdb1
> - - const: rxdb0
> - - const: rxdb1
> + oneOf:
> + - items:
> + - const: txdb0
> + - const: txdb1
> + - const: rxdb0
> + - const: rxdb1
> + - items:
> + - const: tx
> + - const: rx
> + - const: rxdb
These are completely different mailboxes?
>
> memory-region:
> description:
> phandle to a node describing reserved memory (System RAM memory)
> used by DSP (see bindings/reserved-memory/reserved-memory.txt)
> - maxItems: 1
> + minItems: 1
> + maxItems: 4
> +
> + firmware-name:
> + description: |
> + Default name of the firmware to load to the remote processor.
> +
> + fsl,dsp-ctrl:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to syscon block which provide access for processor enablement
Curious, how is this done with the open sound f/w?
>
> required:
> - compatible
> @@ -91,3 +122,41 @@ examples:
> mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
> memory-region = <&dsp_reserved>;
> };
> + - |
> + #include <dt-bindings/clock/imx8mp-clock.h>
> + dsp_reserved: dsp@...00000 {
> + reg = <0x92400000 0x1000000>;
> + no-map;
> + };
> + dsp_vdev0vring0: vdev0vring0@...f0000 {
> + reg = <0x942f0000 0x8000>;
> + no-map;
> + };
> + dsp_vdev0vring1: vdev0vring1@...f8000 {
> + reg = <0x942f8000 0x8000>;
> + no-map;
> + };
> + dsp_vdev0buffer: vdev0buffer@...00000 {
> + compatible = "shared-dma-pool";
> + reg = <0x94300000 0x100000>;
> + no-map;
> + };
> +
> + dsp: dsp@...e8000 {
> + compatible = "fsl,imx8mp-hifi4";
> + reg = <0x3B6E8000 0x88000>;
> + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
> + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>,
> + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
> + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>;
> + clock-names = "ipg", "ocram", "core", "debug";
> + firmware-name = "imx/dsp/hifi4.bin";
> + power-domains = <&audiomix_pd>;
> + mbox-names = "tx", "rx", "rxdb";
> + mboxes = <&mu2 0 0>,
> + <&mu2 1 0>,
> + <&mu2 3 0>;
> + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
> + <&dsp_vdev0vring1>, <&dsp_reserved>;
> + fsl,dsp-ctrl = <&audio_blk_ctrl>;
> + };
> --
> 2.17.1
>
>
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