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Date:   Fri, 10 Sep 2021 10:29:51 +0800
From:   moudy ho <moudy.ho@...iatek.com>
To:     Chun-Kuang Hu <chunkuang.hu@...nel.org>
CC:     Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        "Hans Verkuil" <hverkuil-cisco@...all.nl>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        Maoguang Meng <maoguang.meng@...iatek.com>,
        daoyuan huang <daoyuan.huang@...iatek.com>,
        Ping-Hsun Wu <ping-hsun.wu@...iatek.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Rob Landley <rob@...dley.net>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Linux Media Mailing List <linux-media@...r.kernel.org>,
        DTML <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Tomasz Figa <tfiga@...omium.org>,
        "Nicolas Boichat" <drinkcat@...omium.org>,
        Alexandre Courbot <acourbot@...omium.org>,
        Pi-Hsun Shih <pihsun@...omium.org>, <menghui.lin@...iatek.com>,
        Sj Huang (黃信璋) 
        <sj.huang@...iatek.com>, <ben.lok@...iatek.com>,
        <randy.wu@...iatek.com>,
        srv_heupstream <srv_heupstream@...iatek.com>,
        Hsin-Yi Wang <hsinyi@...gle.com>
Subject: Re: [PATCH v7 3/5] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings

On Tue, 2021-09-07 at 08:11 +0800, Chun-Kuang Hu wrote:
> Hi, Moudy:
> 
> Moudy Ho <moudy.ho@...iatek.com> 於 2021年8月24日 週二 下午6:02寫道:
> > 
> > This patch adds DT binding document for Media Data Path 3 (MDP3)
> > a unit in multimedia system used for scaling and color format
> > convert.
> > 
> > Signed-off-by: Moudy Ho <moudy.ho@...iatek.com>
> > ---
> >  .../bindings/media/mediatek,mdp3-ccorr.yaml   |  57 +++++
> >  .../bindings/media/mediatek,mdp3-rdma.yaml    | 207
> > ++++++++++++++++++
> >  .../bindings/media/mediatek,mdp3-rsz.yaml     |  65 ++++++
> >  .../bindings/media/mediatek,mdp3-wdma.yaml    |  71 ++++++
> >  .../bindings/media/mediatek,mdp3-wrot.yaml    |  71 ++++++
> >  5 files changed, 471 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml
> 
> I've compared ccorr driver in display [1] and ccorr in mdp [2], both
> are similar. So I would like both binding document are placed
> together. In display folder? In mdp folder? In SoC folder? I've no
> idea which one is better. At lease put together.
> 
> [1] 
> https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c?h=v5.14__;!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeycP_k2IQ$
>  
> [2] 
> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20210824100027.25989-6-moudy.ho@mediatek.com/__;!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeyTwjz4UU$
>  
> 
> Regards,
> Chun-Kuang.

Hi Chun-Kuang,

Thank you for your recommendation.
I will integrate the same component binding files in MDP and DISP, and
place them in the folder same with MMSYS instead.
(
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
)
The first version of RDMA, CCORR, AAL, COLOR and WDMA will be provided
by MDP and then DISP add it own property later.

Thanks & Regards,
Moudy Ho
> 
> >  create mode 100644
> > Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> >  create mode 100644
> > Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml
> >  create mode 100644
> > Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml
> >  create mode 100644
> > Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-
> > ccorr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-
> > ccorr.yaml
> > new file mode 100644
> > index 000000000000..59fd68b46022
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-
> > ccorr.yaml
> > @@ -0,0 +1,57 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: 
> > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeyW4MmXUY$
> >  
> > +$schema: 
> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeydwX0gSy$
> >  
> > +
> > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings
> > +
> > +maintainers:
> > +  - Daoyuan Huang <daoyuan.huang@...iatek.com>
> > +  - Moudy Ho <moudy.ho@...iatek.com>
> > +
> > +description: |
> > +  One of Media Data Path 3 (MDP3) components used to do color
> > correction with 3X3 matrix.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +        - mediatek,mt8183-mdp3-ccorr
> > +
> > +  mediatek,mdp3-id:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    maxItems: 1
> > +    description: |
> > +      HW index to distinguish same functionality modules.
> > +
> > +  reg:
> > +    description: |
> > +      Physical base address and length of the function block
> > +      register space, the number aligns with the component
> > +      and its own subcomponent.
> > +
> > +  mediatek,gce-client-reg:
> > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > +    description: |
> > +      sub-system id corresponding to the global command engine
> > (GCE)
> > +      register address.
> > +      $ref: /schemas/mailbox/mtk-gce.txt
> > +
> > +  clocks:
> > +    minItems: 1
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/mt8183-clk.h>
> > +    #include <dt-bindings/gce/mt8183-gce.h>
> > +
> > +    mdp3_ccorr: mdp3_ccorr@...1c000 {
> > +      compatible = "mediatek,mt8183-mdp3-ccorr";
> > +      mediatek,mdp3-id = <0>;
> > +      reg = <0x1401c000 0x1000>;
> > +      mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000
> > 0x1000>;
> > +      clocks = <&mmsys CLK_MM_MDP_CCORR>;
> > +    };

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