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Date: Fri, 10 Sep 2021 19:08:09 +0800
From: kernel test robot <lkp@...el.com>
To: Leonardo Bras <leobras.c@...il.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Michael Ellerman <mpe@...erman.id.au>
Subject: arch/powerpc/platforms/pseries/iommu.c:1405 enable_ddw() warn:
inconsistent indenting
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: bf9f243f23e6623f310ba03fbb14e10ec3a61290
commit: 381ceda88c4c4c8345cad1cffa6328892f15dca6 powerpc/pseries/iommu: Make use of DDW for indirect mapping
date: 2 weeks ago
config: powerpc64-randconfig-m031-20210910 (attached as .config)
compiler: powerpc64le-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
New smatch warnings:
arch/powerpc/platforms/pseries/iommu.c:1405 enable_ddw() warn: inconsistent indenting
Old smatch warnings:
arch/powerpc/platforms/pseries/iommu.c:1490 enable_ddw() warn: inconsistent indenting
vim +1405 arch/powerpc/platforms/pseries/iommu.c
7ed2ed2db2685a Leonardo Bras 2021-08-17 1211
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1212 /*
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1213 * If the PE supports dynamic dma windows, and there is space for a table
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1214 * that can map all pages in a linear offset, then setup such a table,
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1215 * and record the dma-offset in the struct device.
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1216 *
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1217 * dev: the pci device we are checking
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1218 * pdn: the parent pe node with the ibm,dma_window property
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1219 * Future: also check if we can remap the base window for our base page size
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1220 *
2ca73c54ce2448 Leonardo Bras 2021-08-17 1221 * returns true if can map all pages (direct mapping), false otherwise..
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1222 */
2ca73c54ce2448 Leonardo Bras 2021-08-17 1223 static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1224 {
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1225 int len = 0, ret;
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1226 int max_ram_len = order_base_2(ddw_memory_hotplug_max());
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1227 struct ddw_query_response query;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1228 struct ddw_create_response create;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1229 int page_shift;
7ed2ed2db2685a Leonardo Bras 2021-08-17 1230 u64 win_addr;
381ceda88c4c4c Leonardo Bras 2021-08-17 1231 const char *win_name;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1232 struct device_node *dn;
cac3e629086f1b Leonardo Bras 2020-08-05 1233 u32 ddw_avail[DDW_APPLICABLE_SIZE];
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1234 struct direct_window *window;
767303349e052a Nishanth Aravamudan 2011-05-06 1235 struct property *win64;
2ca73c54ce2448 Leonardo Bras 2021-08-17 1236 bool ddw_enabled = false;
61435690a9c781 Nishanth Aravamudan 2013-03-07 1237 struct failed_ddw_pdn *fpdn;
381ceda88c4c4c Leonardo Bras 2021-08-17 1238 bool default_win_removed = false, direct_mapping = false;
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1239 bool pmem_present;
381ceda88c4c4c Leonardo Bras 2021-08-17 1240 struct pci_dn *pci = PCI_DN(pdn);
381ceda88c4c4c Leonardo Bras 2021-08-17 1241 struct iommu_table *tbl = pci->table_group->tables[0];
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1242
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1243 dn = of_find_node_by_type(NULL, "ibm,pmemory");
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1244 pmem_present = dn != NULL;
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1245 of_node_put(dn);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1246
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1247 mutex_lock(&direct_window_init_mutex);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1248
2ca73c54ce2448 Leonardo Bras 2021-08-17 1249 if (find_existing_ddw(pdn, &dev->dev.archdata.dma_offset, &len)) {
381ceda88c4c4c Leonardo Bras 2021-08-17 1250 direct_mapping = (len >= max_ram_len);
2ca73c54ce2448 Leonardo Bras 2021-08-17 1251 ddw_enabled = true;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1252 goto out_unlock;
2ca73c54ce2448 Leonardo Bras 2021-08-17 1253 }
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1254
61435690a9c781 Nishanth Aravamudan 2013-03-07 1255 /*
61435690a9c781 Nishanth Aravamudan 2013-03-07 1256 * If we already went through this for a previous function of
61435690a9c781 Nishanth Aravamudan 2013-03-07 1257 * the same device and failed, we don't want to muck with the
61435690a9c781 Nishanth Aravamudan 2013-03-07 1258 * DMA window again, as it will race with in-flight operations
61435690a9c781 Nishanth Aravamudan 2013-03-07 1259 * and can lead to EEHs. The above mutex protects access to the
61435690a9c781 Nishanth Aravamudan 2013-03-07 1260 * list.
61435690a9c781 Nishanth Aravamudan 2013-03-07 1261 */
61435690a9c781 Nishanth Aravamudan 2013-03-07 1262 list_for_each_entry(fpdn, &failed_ddw_pdn_list, list) {
b7c670d673d118 Rob Herring 2017-08-21 1263 if (fpdn->pdn == pdn)
61435690a9c781 Nishanth Aravamudan 2013-03-07 1264 goto out_unlock;
61435690a9c781 Nishanth Aravamudan 2013-03-07 1265 }
61435690a9c781 Nishanth Aravamudan 2013-03-07 1266
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1267 /*
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1268 * the ibm,ddw-applicable property holds the tokens for:
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1269 * ibm,query-pe-dma-window
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1270 * ibm,create-pe-dma-window
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1271 * ibm,remove-pe-dma-window
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1272 * for the given node in that order.
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1273 * the property is actually in the parent, not the PE
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1274 */
9410e0185e6539 Alexey Kardashevskiy 2014-09-25 1275 ret = of_property_read_u32_array(pdn, "ibm,ddw-applicable",
cac3e629086f1b Leonardo Bras 2020-08-05 1276 &ddw_avail[0], DDW_APPLICABLE_SIZE);
9410e0185e6539 Alexey Kardashevskiy 2014-09-25 1277 if (ret)
ae69e1eddc646f Nishanth Aravamudan 2014-01-10 1278 goto out_failed;
25ebc45b93452d Nishanth Aravamudan 2012-05-15 1279
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1280 /*
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1281 * Query if there is a second window of size to map the
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1282 * whole partition. Query returns number of windows, largest
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1283 * block assigned to PE (partition endpoint), and two bitmasks
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1284 * of page sizes: supported and supported for migrate-dma.
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1285 */
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1286 dn = pci_device_to_OF_node(dev);
80f0251231131d Leonardo Bras 2020-08-05 1287 ret = query_ddw(dev, ddw_avail, &query, pdn);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1288 if (ret != 0)
ae69e1eddc646f Nishanth Aravamudan 2014-01-10 1289 goto out_failed;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1290
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1291 /*
8c0d51592f6f01 Leonardo Bras 2020-08-05 1292 * If there is no window available, remove the default DMA window,
8c0d51592f6f01 Leonardo Bras 2020-08-05 1293 * if it's present. This will make all the resources available to the
8c0d51592f6f01 Leonardo Bras 2020-08-05 1294 * new DDW window.
8c0d51592f6f01 Leonardo Bras 2020-08-05 1295 * If anything fails after this, we need to restore it, so also check
8c0d51592f6f01 Leonardo Bras 2020-08-05 1296 * for extensions presence.
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1297 */
8c0d51592f6f01 Leonardo Bras 2020-08-05 1298 if (query.windows_available == 0) {
8c0d51592f6f01 Leonardo Bras 2020-08-05 1299 struct property *default_win;
8c0d51592f6f01 Leonardo Bras 2020-08-05 1300 int reset_win_ext;
8c0d51592f6f01 Leonardo Bras 2020-08-05 1301
8c0d51592f6f01 Leonardo Bras 2020-08-05 1302 default_win = of_find_property(pdn, "ibm,dma-window", NULL);
8c0d51592f6f01 Leonardo Bras 2020-08-05 1303 if (!default_win)
8c0d51592f6f01 Leonardo Bras 2020-08-05 1304 goto out_failed;
8c0d51592f6f01 Leonardo Bras 2020-08-05 1305
8c0d51592f6f01 Leonardo Bras 2020-08-05 1306 reset_win_ext = ddw_read_ext(pdn, DDW_EXT_RESET_DMA_WIN, NULL);
8c0d51592f6f01 Leonardo Bras 2020-08-05 1307 if (reset_win_ext)
8c0d51592f6f01 Leonardo Bras 2020-08-05 1308 goto out_failed;
8c0d51592f6f01 Leonardo Bras 2020-08-05 1309
8c0d51592f6f01 Leonardo Bras 2020-08-05 1310 remove_dma_window(pdn, ddw_avail, default_win);
8c0d51592f6f01 Leonardo Bras 2020-08-05 1311 default_win_removed = true;
8c0d51592f6f01 Leonardo Bras 2020-08-05 1312
8c0d51592f6f01 Leonardo Bras 2020-08-05 1313 /* Query again, to check if the window is available */
8c0d51592f6f01 Leonardo Bras 2020-08-05 1314 ret = query_ddw(dev, ddw_avail, &query, pdn);
8c0d51592f6f01 Leonardo Bras 2020-08-05 1315 if (ret != 0)
8c0d51592f6f01 Leonardo Bras 2020-08-05 1316 goto out_failed;
8c0d51592f6f01 Leonardo Bras 2020-08-05 1317
8c0d51592f6f01 Leonardo Bras 2020-08-05 1318 if (query.windows_available == 0) {
8c0d51592f6f01 Leonardo Bras 2020-08-05 1319 /* no windows are available for this device. */
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1320 dev_dbg(&dev->dev, "no free dynamic windows");
ae69e1eddc646f Nishanth Aravamudan 2014-01-10 1321 goto out_failed;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1322 }
8c0d51592f6f01 Leonardo Bras 2020-08-05 1323 }
472724111f0f72 Leonardo Bras 2021-04-08 1324
472724111f0f72 Leonardo Bras 2021-04-08 1325 page_shift = iommu_get_page_shift(query.page_size);
472724111f0f72 Leonardo Bras 2021-04-08 1326 if (!page_shift) {
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1327 dev_dbg(&dev->dev, "no supported direct page size in mask %x",
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1328 query.page_size);
ae69e1eddc646f Nishanth Aravamudan 2014-01-10 1329 goto out_failed;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1330 }
381ceda88c4c4c Leonardo Bras 2021-08-17 1331
381ceda88c4c4c Leonardo Bras 2021-08-17 1332
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1333 /*
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1334 * The "ibm,pmemory" can appear anywhere in the address space.
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1335 * Assuming it is still backed by page structs, try MAX_PHYSMEM_BITS
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1336 * for the upper limit and fallback to max RAM otherwise but this
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1337 * disables device::dma_ops_bypass.
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1338 */
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1339 len = max_ram_len;
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1340 if (pmem_present) {
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1341 if (query.largest_available_block >=
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1342 (1ULL << (MAX_PHYSMEM_BITS - page_shift)))
a9d2f9bb225fd2 Leonardo Bras 2021-04-20 1343 len = MAX_PHYSMEM_BITS;
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1344 else
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1345 dev_info(&dev->dev, "Skipping ibm,pmemory");
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1346 }
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1347
381ceda88c4c4c Leonardo Bras 2021-08-17 1348 /* check if the available block * number of ptes will map everything */
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1349 if (query.largest_available_block < (1ULL << (len - page_shift))) {
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1350 dev_dbg(&dev->dev,
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1351 "can't map partition max 0x%llx with %llu %llu-sized pages\n",
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1352 1ULL << len,
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1353 query.largest_available_block,
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1354 1ULL << page_shift);
381ceda88c4c4c Leonardo Bras 2021-08-17 1355
381ceda88c4c4c Leonardo Bras 2021-08-17 1356 /* DDW + IOMMU on single window may fail if there is any allocation */
381ceda88c4c4c Leonardo Bras 2021-08-17 1357 if (default_win_removed && iommu_table_in_use(tbl)) {
381ceda88c4c4c Leonardo Bras 2021-08-17 1358 dev_dbg(&dev->dev, "current IOMMU table in use, can't be replaced.\n");
ae69e1eddc646f Nishanth Aravamudan 2014-01-10 1359 goto out_failed;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1360 }
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1361
381ceda88c4c4c Leonardo Bras 2021-08-17 1362 len = order_base_2(query.largest_available_block << page_shift);
381ceda88c4c4c Leonardo Bras 2021-08-17 1363 win_name = DMA64_PROPNAME;
381ceda88c4c4c Leonardo Bras 2021-08-17 1364 } else {
381ceda88c4c4c Leonardo Bras 2021-08-17 1365 direct_mapping = true;
381ceda88c4c4c Leonardo Bras 2021-08-17 1366 win_name = DIRECT64_PROPNAME;
381ceda88c4c4c Leonardo Bras 2021-08-17 1367 }
381ceda88c4c4c Leonardo Bras 2021-08-17 1368
b73a635f348610 Milton Miller 2011-05-11 1369 ret = create_ddw(dev, ddw_avail, &create, page_shift, len);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1370 if (ret != 0)
7ed2ed2db2685a Leonardo Bras 2021-08-17 1371 goto out_failed;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1372
b7c670d673d118 Rob Herring 2017-08-21 1373 dev_dbg(&dev->dev, "created tce table LIOBN 0x%x for %pOF\n",
b7c670d673d118 Rob Herring 2017-08-21 1374 create.liobn, dn);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1375
7ed2ed2db2685a Leonardo Bras 2021-08-17 1376 win_addr = ((u64)create.addr_hi << 32) | create.addr_lo;
381ceda88c4c4c Leonardo Bras 2021-08-17 1377 win64 = ddw_property_create(win_name, create.liobn, win_addr, page_shift, len);
381ceda88c4c4c Leonardo Bras 2021-08-17 1378
7ed2ed2db2685a Leonardo Bras 2021-08-17 1379 if (!win64) {
7ed2ed2db2685a Leonardo Bras 2021-08-17 1380 dev_info(&dev->dev,
7ed2ed2db2685a Leonardo Bras 2021-08-17 1381 "couldn't allocate property, property name, or value\n");
7ed2ed2db2685a Leonardo Bras 2021-08-17 1382 goto out_remove_win;
7ed2ed2db2685a Leonardo Bras 2021-08-17 1383 }
7ed2ed2db2685a Leonardo Bras 2021-08-17 1384
7ed2ed2db2685a Leonardo Bras 2021-08-17 1385 ret = of_add_property(pdn, win64);
7ed2ed2db2685a Leonardo Bras 2021-08-17 1386 if (ret) {
7ed2ed2db2685a Leonardo Bras 2021-08-17 1387 dev_err(&dev->dev, "unable to add dma window property for %pOF: %d",
7ed2ed2db2685a Leonardo Bras 2021-08-17 1388 pdn, ret);
7ed2ed2db2685a Leonardo Bras 2021-08-17 1389 goto out_free_prop;
7ed2ed2db2685a Leonardo Bras 2021-08-17 1390 }
7ed2ed2db2685a Leonardo Bras 2021-08-17 1391
7ed2ed2db2685a Leonardo Bras 2021-08-17 1392 window = ddw_list_new_entry(pdn, win64->value);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1393 if (!window)
7ed2ed2db2685a Leonardo Bras 2021-08-17 1394 goto out_del_prop;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1395
381ceda88c4c4c Leonardo Bras 2021-08-17 1396 if (direct_mapping) {
381ceda88c4c4c Leonardo Bras 2021-08-17 1397 /* DDW maps the whole partition, so enable direct DMA mapping */
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1398 ret = walk_system_ram_range(0, memblock_end_of_DRAM() >> PAGE_SHIFT,
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1399 win64->value, tce_setrange_multi_pSeriesLP_walk);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1400 if (ret) {
b7c670d673d118 Rob Herring 2017-08-21 1401 dev_info(&dev->dev, "failed to map direct window for %pOF: %d\n",
b7c670d673d118 Rob Herring 2017-08-21 1402 dn, ret);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1403
7ed2ed2db2685a Leonardo Bras 2021-08-17 1404 /* Make sure to clean DDW if any TCE was set*/
7ed2ed2db2685a Leonardo Bras 2021-08-17 @1405 clean_dma_window(pdn, win64->value);
7ed2ed2db2685a Leonardo Bras 2021-08-17 1406 goto out_del_list;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1407 }
381ceda88c4c4c Leonardo Bras 2021-08-17 1408 } else {
381ceda88c4c4c Leonardo Bras 2021-08-17 1409 struct iommu_table *newtbl;
381ceda88c4c4c Leonardo Bras 2021-08-17 1410 int i;
381ceda88c4c4c Leonardo Bras 2021-08-17 1411
381ceda88c4c4c Leonardo Bras 2021-08-17 1412 for (i = 0; i < ARRAY_SIZE(pci->phb->mem_resources); i++) {
381ceda88c4c4c Leonardo Bras 2021-08-17 1413 const unsigned long mask = IORESOURCE_MEM_64 | IORESOURCE_MEM;
381ceda88c4c4c Leonardo Bras 2021-08-17 1414
381ceda88c4c4c Leonardo Bras 2021-08-17 1415 /* Look for MMIO32 */
381ceda88c4c4c Leonardo Bras 2021-08-17 1416 if ((pci->phb->mem_resources[i].flags & mask) == IORESOURCE_MEM)
381ceda88c4c4c Leonardo Bras 2021-08-17 1417 break;
381ceda88c4c4c Leonardo Bras 2021-08-17 1418 }
381ceda88c4c4c Leonardo Bras 2021-08-17 1419
381ceda88c4c4c Leonardo Bras 2021-08-17 1420 if (i == ARRAY_SIZE(pci->phb->mem_resources))
381ceda88c4c4c Leonardo Bras 2021-08-17 1421 goto out_del_list;
381ceda88c4c4c Leonardo Bras 2021-08-17 1422
381ceda88c4c4c Leonardo Bras 2021-08-17 1423 /* New table for using DDW instead of the default DMA window */
381ceda88c4c4c Leonardo Bras 2021-08-17 1424 newtbl = iommu_pseries_alloc_table(pci->phb->node);
381ceda88c4c4c Leonardo Bras 2021-08-17 1425 if (!newtbl) {
381ceda88c4c4c Leonardo Bras 2021-08-17 1426 dev_dbg(&dev->dev, "couldn't create new IOMMU table\n");
381ceda88c4c4c Leonardo Bras 2021-08-17 1427 goto out_del_list;
381ceda88c4c4c Leonardo Bras 2021-08-17 1428 }
381ceda88c4c4c Leonardo Bras 2021-08-17 1429
381ceda88c4c4c Leonardo Bras 2021-08-17 1430 iommu_table_setparms_common(newtbl, pci->phb->bus->number, create.liobn, win_addr,
381ceda88c4c4c Leonardo Bras 2021-08-17 1431 1UL << len, page_shift, NULL, &iommu_table_lpar_multi_ops);
381ceda88c4c4c Leonardo Bras 2021-08-17 1432 iommu_init_table(newtbl, pci->phb->node, pci->phb->mem_resources[i].start,
381ceda88c4c4c Leonardo Bras 2021-08-17 1433 pci->phb->mem_resources[i].end);
381ceda88c4c4c Leonardo Bras 2021-08-17 1434
381ceda88c4c4c Leonardo Bras 2021-08-17 1435 pci->table_group->tables[1] = newtbl;
381ceda88c4c4c Leonardo Bras 2021-08-17 1436
381ceda88c4c4c Leonardo Bras 2021-08-17 1437 /* Keep default DMA window stuct if removed */
381ceda88c4c4c Leonardo Bras 2021-08-17 1438 if (default_win_removed) {
381ceda88c4c4c Leonardo Bras 2021-08-17 1439 tbl->it_size = 0;
381ceda88c4c4c Leonardo Bras 2021-08-17 1440 kfree(tbl->it_map);
381ceda88c4c4c Leonardo Bras 2021-08-17 1441 }
381ceda88c4c4c Leonardo Bras 2021-08-17 1442
381ceda88c4c4c Leonardo Bras 2021-08-17 1443 set_iommu_table_base(&dev->dev, newtbl);
381ceda88c4c4c Leonardo Bras 2021-08-17 1444 }
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1445
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1446 spin_lock(&direct_window_list_lock);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1447 list_add(&window->list, &direct_window_list);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1448 spin_unlock(&direct_window_list_lock);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1449
7ed2ed2db2685a Leonardo Bras 2021-08-17 1450 dev->dev.archdata.dma_offset = win_addr;
2ca73c54ce2448 Leonardo Bras 2021-08-17 1451 ddw_enabled = true;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1452 goto out_unlock;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1453
7ed2ed2db2685a Leonardo Bras 2021-08-17 1454 out_del_list:
7a19081fc26581 Julia Lawall 2011-08-08 1455 kfree(window);
7a19081fc26581 Julia Lawall 2011-08-08 1456
7ed2ed2db2685a Leonardo Bras 2021-08-17 1457 out_del_prop:
7ed2ed2db2685a Leonardo Bras 2021-08-17 1458 of_remove_property(pdn, win64);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1459
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1460 out_free_prop:
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1461 kfree(win64->name);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1462 kfree(win64->value);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1463 kfree(win64);
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1464
7ed2ed2db2685a Leonardo Bras 2021-08-17 1465 out_remove_win:
7ed2ed2db2685a Leonardo Bras 2021-08-17 1466 /* DDW is clean, so it's ok to call this directly. */
7ed2ed2db2685a Leonardo Bras 2021-08-17 1467 __remove_dma_window(pdn, ddw_avail, create.liobn);
7ed2ed2db2685a Leonardo Bras 2021-08-17 1468
ae69e1eddc646f Nishanth Aravamudan 2014-01-10 1469 out_failed:
8c0d51592f6f01 Leonardo Bras 2020-08-05 1470 if (default_win_removed)
8c0d51592f6f01 Leonardo Bras 2020-08-05 1471 reset_dma_window(dev, pdn);
25ebc45b93452d Nishanth Aravamudan 2012-05-15 1472
61435690a9c781 Nishanth Aravamudan 2013-03-07 1473 fpdn = kzalloc(sizeof(*fpdn), GFP_KERNEL);
61435690a9c781 Nishanth Aravamudan 2013-03-07 1474 if (!fpdn)
61435690a9c781 Nishanth Aravamudan 2013-03-07 1475 goto out_unlock;
61435690a9c781 Nishanth Aravamudan 2013-03-07 1476 fpdn->pdn = pdn;
61435690a9c781 Nishanth Aravamudan 2013-03-07 1477 list_add(&fpdn->list, &failed_ddw_pdn_list);
61435690a9c781 Nishanth Aravamudan 2013-03-07 1478
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1479 out_unlock:
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1480 mutex_unlock(&direct_window_init_mutex);
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1481
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1482 /*
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1483 * If we have persistent memory and the window size is only as big
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1484 * as RAM, then we failed to create a window to cover persistent
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1485 * memory and need to set the DMA limit.
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1486 */
381ceda88c4c4c Leonardo Bras 2021-08-17 1487 if (pmem_present && ddw_enabled && direct_mapping && len == max_ram_len)
2ca73c54ce2448 Leonardo Bras 2021-08-17 1488 dev->dev.bus_dma_limit = dev->dev.archdata.dma_offset + (1ULL << len);
bf6e2d562bbc4d Alexey Kardashevskiy 2020-10-29 1489
381ceda88c4c4c Leonardo Bras 2021-08-17 1490 return ddw_enabled && direct_mapping;
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1491 }
4e8b0cf46b2570 Nishanth Aravamudan 2011-02-10 1492
:::::: The code at line 1405 was first introduced by commit
:::::: 7ed2ed2db2685a285cb09ab330dc4efea0b64022 powerpc/pseries/iommu: Add ddw_property_create() and refactor enable_ddw()
:::::: TO: Leonardo Bras <leobras.c@...il.com>
:::::: CC: Michael Ellerman <mpe@...erman.id.au>
---
0-DAY CI Kernel Test Service, Intel Corporation
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