linux-kernel - Re: [RFC PATCH V4 6/6] riscv: soc: Add Allwinner SoC kconfig option

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 13 Sep 2021 11:48:48 -0700
From:   Randy Dunlap <rdunlap@...radead.org>
To:     Guo Ren <guoren@...nel.org>, Maxime Ripard <maxime@...no.tech>
Cc:     Anup Patel <anup.patel@....com>, Atish Patra <atish.patra@....com>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>,
        Christoph Müllner <christoph.muellner@...ll.eu>,
        philipp.tomsich@...ll.eu, Christoph Hellwig <hch@....de>,
        liush <liush@...winnertech.com>, wefu@...hat.com,
        Wei Wu (吴伟) <lazyparser@...il.com>,
        Drew Fustini <drew@...gleboard.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        taiten.peng@...onical.com, aniket.ponkshe@...onical.com,
        heinrich.schuchardt@...onical.com, gordan.markus@...onical.com,
        Guo Ren <guoren@...ux.alibaba.com>,
        Chen-Yu Tsai <wens@...e.org>
Subject: Re: [RFC PATCH V4 6/6] riscv: soc: Add Allwinner SoC kconfig option

On 9/13/21 2:20 AM, Guo Ren wrote:
> On Mon, Sep 13, 2021 at 4:45 PM Maxime Ripard <maxime@...no.tech> wrote:
>>
>> Hi,
>>
>> On Sat, Sep 11, 2021 at 05:21:39PM +0800, guoren@...nel.org wrote:
>>> From: Liu Shaohua <liush@...winnertech.com>
>>>
>>> Add Allwinner kconfig option which selects SoC specific and common
>>> drivers that is required for this SoC.
>>>
>>> Allwinner D1 uses custom PTE attributes to solve non-coherency SOC
>>> interconnect issues for dma synchronization, so we set the default
>>> value when SOC_SUNXI selected.
>>>
>>> Signed-off-by: Liu Shaohua <liush@...winnertech.com>
>>> Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
>>> Signed-off-by: Wei Fu <wefu@...hat.com>
>>> Cc: Anup Patel <anup.patel@....com>
>>> Cc: Atish Patra <atish.patra@....com>
>>> Cc: Christoph Hellwig <hch@....de>
>>> Cc: Chen-Yu Tsai <wens@...e.org>
>>> Cc: Drew Fustini <drew@...gleboard.org>
>>> Cc: Maxime Ripard <maxime@...no.tech>
>>> Cc: Palmer Dabbelt <palmerdabbelt@...gle.com>
>>> Cc: Wei Wu <lazyparser@...il.com>
>>> ---
>>>   arch/riscv/Kconfig.socs      | 15 +++++++++++++++
>>>   arch/riscv/configs/defconfig |  1 +
>>>   2 files changed, 16 insertions(+)
>>>
>>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>>> index 30676ebb16eb..8721c000ef23 100644
>>> --- a/arch/riscv/Kconfig.socs
>>> +++ b/arch/riscv/Kconfig.socs
>>> @@ -70,4 +70,19 @@ config SOC_CANAAN_K210_DTB_SOURCE
>>>
>>>   endif
>>>
>>> +config SOC_SUNXI
>>> +     bool "Allwinner SoCs"
>>> +     depends on MMU
>>> +     select DWMAC_GENERIC
>>> +     select ERRATA_THEAD
>>> +     select RISCV_DMA_NONCOHERENT
>>> +     select RISCV_ERRATA_ALTERNATIVE
>>> +     select SERIAL_8250
>>> +     select SERIAL_8250_CONSOLE
>>> +     select SERIAL_8250_DW
>>> +     select SIFIVE_PLIC
>>> +     select STMMAC_ETH
>>> +     help
>>> +       This enables support for Allwinner SoC platforms like the D1.
>>> +
>>
>> I'm not sure we should select the drivers there. We could very well
>> imagine a board without UART, or even more so without ethernet.
> We just want people could bring D1 up easier, 8250 is the basic component.
> 
> 
>>
>> These options should be in the defconfig.

Agreed, using a defconfig is the right way to do this.

-- 
~Randy