lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 13 Sep 2021 13:01:25 -0700
From:   "Andy Lutomirski" <luto@...nel.org>
To:     "Lai Jiangshan" <jiangshanlai@...il.com>,
        "Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>
Cc:     "Lai Jiangshan" <laijs@...ux.alibaba.com>,
        "Thomas Gleixner" <tglx@...utronix.de>,
        "Ingo Molnar" <mingo@...hat.com>, "Borislav Petkov" <bp@...en8.de>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        "H. Peter Anvin" <hpa@...or.com>,
        "Dave Hansen" <dave.hansen@...ux.intel.com>,
        "Peter Zijlstra (Intel)" <peterz@...radead.org>,
        "Dave Jiang" <dave.jiang@...el.com>,
        "Ben Widawsky" <ben.widawsky@...el.com>,
        "Williams, Dan J" <dan.j.williams@...el.com>,
        "Arvind Sankar" <nivedita@...m.mit.edu>
Subject: Re: [PATCH 25/24] x86/traps: Rewrite native_load_gs_index in C code



On Thu, Sep 2, 2021, at 3:50 AM, Lai Jiangshan wrote:
> From: Lai Jiangshan <laijs@...ux.alibaba.com>
> 
> There is no constrain/limition to force native_load_gs_index() to be in
> ASM code.
> 
> Signed-off-by: Lai Jiangshan <laijs@...ux.alibaba.com>

>  
>  #ifdef CONFIG_X86_64
> +
> +/*
> + * Reload gs selector with exception handling
> + * selector:  new selector
> + *
> + * Is noinstr as it shouldn't be instrumented.
> + */
> +noinstr void native_load_gs_index(unsigned int selector)
> +{
> +	unsigned long flags;
> +
> +	local_irq_save(flags);

This patch would be a bit less alarming if you moved the swapgs into asm.  Also, this needs a comment explaining why skipping the swapgs back to kernel gs in the exception path is correct.

> +	native_swapgs();
> +	asm volatile(
> +		".global asm_load_gs_index_gs_change \n"
> +		"asm_load_gs_index_gs_change: \n"
> +		"1: movl %0, %%gs \n"
> +		"   swapgs \n"
> +		"2: \n"
> +		_ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_clear_gs)
> +		:: "r" (selector) : "memory");
> +	alternative("", "mfence", X86_BUG_SWAPGS_FENCE);
> +	local_irq_restore(flags);
> +}
> +

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ