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Message-Id: <20210914155607.14122-1-semen.protsenko@linaro.org>
Date: Tue, 14 Sep 2021 18:56:01 +0300
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>
Cc: Ryu Euiyoul <ryu.real@...sung.com>, Tom Gall <tom.gall@...aro.org>,
Sumit Semwal <sumit.semwal@...aro.org>,
John Stultz <john.stultz@...aro.org>,
Amit Pundir <amit.pundir@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-samsung-soc@...r.kernel.org
Subject: [PATCH 0/6] clk: samsung: Introduce Exynos850 SoC clock driver
This patch series provides the implementation for Exynos850 clock
driver, its documentation and corresponding changes for Samsung clock
infrastructure:
- Adds new PLL types used in Exynos850 SoC, following TRM
- Enables bus clock for each registered CMU, if it's provided
I tried to follow already established design for Samsung clock drivers
(getting most insights from Exynos7 and Exynos5433 clock drivers), and
integrate the driver in existing infrastructure. The whole driver was
implemented from scratch, using mostly TRM.
For now only basic clocks are implemented, including next blocks:
- CMU_TOP
- CMU_PERI
- CMU_CORE
- CMU_HSI
Some CMUs are still not implemented, but that can be added in future,
when the need arises. The driver also lacks CLKOUT support, PM ops and
automatic clocks control (using Q-Channel protocol). All that can be
added independently later.
Implemented clock tree was tested via UART and MMC drivers, and using
DebugFS clk support (e.g. using 'clk_summary' file). In order to keep
all clocks running I added 'clk_ignore_unused' kernel param in my local
tree, and defined CLOCK_ALLOW_WRITE_DEBUGFS in clk.c for actually
testing clocks via DebugFS.
Sam Protsenko (6):
clk: samsung: Enable bus clock on init
clk: samsung: clk-pll: Implement pll0822x PLL type
clk: samsung: clk-pll: Implement pll0831x PLL type
dt-bindings: clock: Add bindings definitions for Exynos850 CMU
dt-bindings: clock: Document Exynos850 CMU bindings
clk: samsung: Introduce Exynos850 clock driver
.../clock/samsung,exynos850-clock.yaml | 190 +++++
drivers/clk/samsung/Makefile | 1 +
drivers/clk/samsung/clk-exynos850.c | 700 ++++++++++++++++++
drivers/clk/samsung/clk-pll.c | 196 +++++
drivers/clk/samsung/clk-pll.h | 2 +
drivers/clk/samsung/clk.c | 13 +
include/dt-bindings/clock/exynos850.h | 72 ++
7 files changed, 1174 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
create mode 100644 drivers/clk/samsung/clk-exynos850.c
create mode 100644 include/dt-bindings/clock/exynos850.h
--
2.30.2
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