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Message-ID: <cdfd53e7-ea43-60a4-7150-11ad166ba2d1@hauke-m.de>
Date: Wed, 15 Sep 2021 00:36:37 +0200
From: Hauke Mehrtens <hauke@...ke-m.de>
To: Aleksander Jan Bajkowski <olek2@...pl>, john@...ozen.org,
tsbogend@...ha.franken.de, maz@...nel.org, ralf@...ux-mips.org,
ralph.hempel@...tiq.com, davem@...emloft.net, kuba@...nel.org,
robh+dt@...nel.org, dev@...sin.me, arnd@...db.de, jgg@...pe.ca,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 5/8] net: lantiq: configure the burst length in
ethernet drivers
On 9/14/21 11:21 PM, Aleksander Jan Bajkowski wrote:
> Configure the burst length in Ethernet drivers. This improves
> Ethernet performance by 58%. According to the vendor BSP,
> 8W burst length is supported by ar9 and newer SoCs.
>
> The NAT benchmark results on xRX200 (Down/Up):
> * 2W: 330 Mb/s
> * 4W: 432 Mb/s 372 Mb/s
> * 8W: 520 Mb/s 389 Mb/s
>
> Tested on xRX200 and xRX330.
>
> Signed-off-by: Aleksander Jan Bajkowski <olek2@...pl>
> ---
> drivers/net/ethernet/lantiq_etop.c | 21 ++++++++++++++++++---
> drivers/net/ethernet/lantiq_xrx200.c | 21 ++++++++++++++++++---
> 2 files changed, 36 insertions(+), 6 deletions(-)
>
.....
> diff --git a/drivers/net/ethernet/lantiq_xrx200.c b/drivers/net/ethernet/lantiq_xrx200.c
> index fb78f17d734f..5d96248ce83b 100644
> --- a/drivers/net/ethernet/lantiq_xrx200.c
> +++ b/drivers/net/ethernet/lantiq_xrx200.c
> @@ -71,6 +71,9 @@ struct xrx200_priv {
> struct net_device *net_dev;
> struct device *dev;
>
> + int tx_burst_len;
> + int rx_burst_len;
> +
> __iomem void *pmac_reg;
> };
>
> @@ -316,8 +319,8 @@ static netdev_tx_t xrx200_start_xmit(struct sk_buff *skb,
> if (unlikely(dma_mapping_error(priv->dev, mapping)))
> goto err_drop;
>
> - /* dma needs to start on a 16 byte aligned address */
> - byte_offset = mapping % 16;
> + /* dma needs to start on a burst length value aligned address */
> + byte_offset = mapping % (priv->tx_burst_len * 4);
>
> desc->addr = mapping - byte_offset;
> /* Make sure the address is written before we give it to HW */
> @@ -369,7 +372,7 @@ static int xrx200_dma_init(struct xrx200_priv *priv)
> int ret = 0;
> int i;
>
> - ltq_dma_init_port(DMA_PORT_ETOP);
> + ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
>
> ch_rx->dma.nr = XRX200_DMA_RX;
> ch_rx->dma.dev = priv->dev;
> @@ -478,6 +481,18 @@ static int xrx200_probe(struct platform_device *pdev)
> if (err)
> eth_hw_addr_random(net_dev);
>
> + err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
> + if (err < 0) {
> + dev_err(dev, "unable to read tx-burst-length property\n");
> + return err;
> + }
> +
> + err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
> + if (err < 0) {
> + dev_err(dev, "unable to read rx-burst-length property\n");
> + return err;
> + }
> +
I would prefer if you would hard code these values to 8 for the xrx200
driver. All SoCs with this IP block should support this.
> /* bring up the dma engine and IP core */
> err = xrx200_dma_init(priv);
> if (err)
>
Hauke
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