linux-kernel - Re: [PATCH v5 4/9] perf/x86: Add compiler barrier after updating BTS

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Message-ID: <YUBwqGuQskkw328z@hirez.programming.kicks-ass.net>
Date:   Tue, 14 Sep 2021 11:51:36 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Leo Yan <leo.yan@...aro.org>
Cc:     Arnaldo Carvalho de Melo <acme@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach <mike.leach@...aro.org>,
        Michael Petlan <mpetlan@...hat.com>,
        "Frank Ch. Eigler" <fche@...hat.com>,
        Song Liu <songliubraving@...com>, x86@...nel.org,
        Daniel Díaz <daniel.diaz@...aro.org>,
        Andrii Nakryiko <andriin@...com>,
        Alexei Starovoitov <ast@...nel.org>,
        Sedat Dilek <sedat.dilek@...il.com>,
        Andi Kleen <ak@...ux.intel.com>,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        coresight@...ts.linaro.org
Subject: Re: [PATCH v5 4/9] perf/x86: Add compiler barrier after updating BTS

On Sun, Aug 29, 2021 at 06:56:57PM +0800, Leo Yan wrote:
> Hi Peter, or any x86 maintainer,
> 
> On Mon, Aug 09, 2021 at 07:14:02PM +0800, Leo Yan wrote:
> > Since BTS is coherent, simply add a compiler barrier to separate the BTS
> > update and aux_head store.
> 
> Could you reivew this patch and check if BTS needs the comipler
> barrier in this case?  Thanks.

Yes, a compiler barrier is sufficient.

You want me to pick it up?

> > Signed-off-by: Leo Yan <leo.yan@...aro.org>
> > ---
> >  arch/x86/events/intel/bts.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
> > index 6320d2cfd9d3..974e917e65b2 100644
> > --- a/arch/x86/events/intel/bts.c
> > +++ b/arch/x86/events/intel/bts.c
> > @@ -209,6 +209,12 @@ static void bts_update(struct bts_ctx *bts)
> >  	} else {
> >  		local_set(&buf->data_size, head);
> >  	}
> > +
> > +	/*
> > +	 * Since BTS is coherent, just add compiler barrier to ensure
> > +	 * BTS updating is ordered against bts::handle::event.
> > +	 */
> > +	barrier();
> >  }
> >  
> >  static int
> > -- 
> > 2.25.1
> >